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    PCI-Express AER implemetation: AER core and aerdriver · 6c2b374d
    Zhang, Yanmin authored
    
    
    Patch 3 implements the core part of PCI-Express AER and aerdrv
    port service driver.
    
    When a root port service device is probed, the aerdrv will call
    request_irq to register irq handler for AER error interrupt.
    
    When a device sends an PCI-Express error message to the root port,
    the root port will trigger an interrupt, by either MSI or IO-APIC,
    then kernel would run the irq handler. The handler collects root
    error status register and schedules a work. The work will call
    the core part to process the error based on its type
    (Correctable/non-fatal/fatal).
    
    As for Correctable errors, the patch chooses to just clear the correctable
    error status register of the device.
    
    As for the non-fatal error, the patch follows generic PCI error handler
    rules to call the error callback functions of the endpoint's driver. If
    the device is a bridge, the patch chooses to broadcast the error to
    downstream devices.
    
    As for the fatal error, the patch resets the pci-express link and
    follows generic PCI error handler rules to call the error callback
    functions of the endpoint's driver. If the device is a bridge, the patch
    chooses to broadcast the error to downstream devices.
    
    Signed-off-by: default avatarZhang Yanmin <yanmin.zhang@intel.com>
    Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
    6c2b374d