1. 08 Dec, 2006 23 commits
  2. 07 Dec, 2006 17 commits
    • Ben Dooks's avatar
      [ARM] 4002/1: S3C24XX: leave parent IRQs unmasked · d4f3e084
      Ben Dooks authored
      
      
      Do not bother masking/unmasking the parent IRQ
      for the mulitplexed EINT irqs, as masking the
      leaf seems to be fine.
      Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      d4f3e084
    • Nicolas Pitre's avatar
      [ARM] 3983/2: remove unused argument to __bug() · 7174d852
      Nicolas Pitre authored
      It appears that include/asm-arm/bug.h requires include/linux/stddef.h
      for the definition of NULL. It seems that stddef.h was always included
      indirectly in most cases, and that issue was properly fixed a while ago.
      
      Then commit 5047f09b incorrectly reverted
      change from commit ff10952a
      
       (bad dwmw2)
      and the problem recently resurfaced.
      
      Because the third argument to __bug() is never used anyway, RMK suggested
      getting rid of it entirely instead of readding #include <linux/stddef.h>
      which this patch does.
      Signed-off-by: default avatarNicolas Pitre <nico@cam.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      7174d852
    • Ben Dooks's avatar
      [ARM] 4000/1: Osiris: add third serial port in · ca7aa4de
      Ben Dooks authored
      
      
      Add the mapping for the third S3C2440 serial
      port into the default serial devices for the
      Osiris.
      Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      ca7aa4de
    • Ben Dooks's avatar
      [ARM] 3999/1: RX3715: suspend to RAM support · bbf6f280
      Ben Dooks authored
      
      
      The RX3715 is similar to the H1940 in the way
      that suspend to RAM works, so we can use most
      of the extant support for the H1940 with only
      a few modifictions
      Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      bbf6f280
    • Ben Dooks's avatar
      [ARM] 3998/1: VR1000: LED platform devices · b2eba6bb
      Ben Dooks authored
      
      
      Support for the GPIO attached LEDs on the VR1000
      Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      b2eba6bb
    • Yan Burman's avatar
      [IA64] replace kmalloc+memset with kzalloc · 52fd9108
      Yan Burman authored
      
      
      Replace kmalloc+memset with kzalloc
      Signed-off-by: default avatarYan Burman <burman.yan@gmail.com>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      52fd9108
    • Christoph Lameter's avatar
      [IA64] resolve name clash by renaming is_available_memory() · 66888a6e
      Christoph Lameter authored
      
      
      There is a name clash with ia64 arch code in Andrew's tree. Rename
      is_avialable_memory() to is_memory_available() to avoid the clash.
      Signed-off-by: default avatarChristoph Lameter <clameter@sgi.com>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      66888a6e
    • Tony Luck's avatar
      [IA64] Need export for csum_ipv6_magic · a5f8ee02
      Tony Luck authored
      
      
      Now we have our own highly optimized assembly code version of
      this routine (Thanks Ken!) we should export it so that it can
      be used.
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      a5f8ee02
    • Venkatesh Pallipadi's avatar
      [PATCH] Add support for type argument in PAL_GET_PSTATE · 17e77b1c
      Venkatesh Pallipadi authored
      PAL_GET_PSTATE accepts a type argument to return different kinds of
      frequency information.
      Refer: Intel Itanium®Architecture Software Developer's Manual -
      Volume 2: System Architecture, Revision 2.2
      (http://developer.intel.com/design/itanium/manuals/245318.htm
      
      )
      
      Add the support for type argument and use Instantaneous frequency
      in the acpi driver.
      
      Also fix a bug, where in return value of PAL_GET_PSTATE was getting compared
      with 'control' bits instead of 'status' bits.
      Signed-off-by: default avatarVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      17e77b1c
    • Chen, Kenneth W's avatar
      [IA64] tidy up return value of ip_fast_csum · 6dbfc19b
      Chen, Kenneth W authored
      
      
      While working on implementing csum_ipv6_magic, I noticed that current
      version of ip_fast_csum will potentially return bits above "unsigned
      short" as 1.  While no harm is done right now because all call sites
      will chop off the upper bits when it uses the return value.  However,
      this is still dangerous and buggy.  Here is a patch to enforce that the
      function really returns unsigned short in the native register format.
      
      The fix is free as there are plenty open slot to add one more asm instruction.
      Signed-off-by: default avatarKen Chen <kenneth.w.chen@intel.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      6dbfc19b
    • Chen, Kenneth W's avatar
      [IA64] implement csum_ipv6_magic for ia64. · 007d77d0
      Chen, Kenneth W authored
      
      
      The asm version is 4.4 times faster than the generic C version and
      10X smaller in code size.
      Signed-off-by: default avatarKen Chen <kenneth.w.chen@intel.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      007d77d0
    • Russ Anderson's avatar
      [IA64] More Itanium PAL spec updates · 5b4d5681
      Russ Anderson authored
      
      
      Additional updates to conform with Rev 2.2 of Volume 2 of "Intel
      Itanium Architecture Software Developer's Manual" (January 2006).
      
      Add pal_bus_features_s bits 52 & 53 (page 2:347)
      Add pal_vm_info_2_s field max_purges (page 2:2:451)
      Add PAL_GET_HW_POLICY call (page 2:381)
      Add PAL_SET_HW_POLICY call (page 2:439)
      
      Sample output before:
      ---------------------------------------------------------------------
      cobra:~ # cat /proc/pal/cpu0/vm_info
      Physical Address Space         : 50 bits
      Virtual Address Space          : 61 bits
      Protection Key Registers(PKR)  : 16
      Implemented bits in PKR.key    : 24
      Hash Tag ID                    : 0x2
      Size of RR.rid                 : 24
      Supported memory attributes    : WB, UC, UCE, WC, NaTPage
      ---------------------------------------------------------------------
      
      Sample output after:
      ---------------------------------------------------------------------
      cobra:~ # cat /proc/pal/cpu0/vm_info
      Physical Address Space         : 50 bits
      Virtual Address Space          : 61 bits
      Protection Key Registers(PKR)  : 16
      Implemented bits in PKR.key    : 24
      Hash Tag ID                    : 0x2
      Max Purges                     : 1
      Size of RR.rid                 : 24
      Supported memory attributes    : WB, UC, UCE, WC, NaTPage
      ---------------------------------------------------------------------
      
      Signed-off-by: Russ Anderson (rja@sgi.com)
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      5b4d5681
    • Russ Anderson's avatar
      [IA64] Update processor_info features · 895309ff
      Russ Anderson authored
      
      
      Add the printing of additional processor features to proc_features.
      
      Based on Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software
      Developer's Manual" (January 2006) fields (pages 2:430-2:432).
      This patch gets the features back in sync with the spec.
      
      Sample output before:
      --------------------------------------------------------------
      cobra:~ # cat /proc/pal/cpu0/processor_info
      XIP,XPSR,XFS implemented                 : On NoCtrl
      XR1-XR3 implemented                      : On NoCtrl
      Disable dynamic predicate prediction     : NotImpl
      Disable processor physical number        : NotImpl
      Disable dynamic data cache prefetch      : NotImpl
      Disable dynamic inst cache prefetch      : NotImpl
      Disable dynamic branch prediction        : NotImpl
      Disable BINIT on processor time-out      : On Ctrl
      Disable dynamic power management (DPM)   : NotImpl
      Disable coherency                        : NotImpl
      Disable cache                            : NotImpl
      Enable CMCI promotion                    : Off Ctrl
      Enable MCA to BINIT promotion            : Off Ctrl
      Enable MCA promotion                     : NotImpl
      Enable BERR promotion                    : NotImpl
      cobra:~ #
      --------------------------------------------------------------
      
      Sample output after:
      --------------------------------------------------------------
      cobra:~ # cat /proc/pal/cpu0/processor_info
      Unimplemented instruction address fault  : NotImpl
      INIT, PMI, and LINT pins                 : NotImpl
      Simple unimplimented instr addresses     : On NoCtrl
      Variable P-state performance             : NotImpl
      Virtual machine features implemeted      : On NoCtrl
      XIP,XPSR,XFS implemented                 : On NoCtrl
      XR1-XR3 implemented                      : On NoCtrl
      Disable dynamic predicate prediction     : NotImpl
      Disable processor physical number        : NotImpl
      Disable dynamic data cache prefetch      : NotImpl
      Disable dynamic inst cache prefetch      : NotImpl
      Disable dynamic branch prediction        : NotImpl
      Disable P-states                         : Off Ctrl
      Enable MCA on Data Poisoning             : Off Ctrl
      Enable vmsw instruction                  : On Ctrl
      Enable extern environmental notification : NotImpl
      Disable BINIT on processor time-out      : On Ctrl
      Disable dynamic power management (DPM)   : NotImpl
      Disable coherency                        : NotImpl
      Disable cache                            : NotImpl
      Enable CMCI promotion                    : Off Ctrl
      Enable MCA to BINIT promotion            : Off Ctrl
      Enable MCA promotion                     : NotImpl
      Enable BERR promotion                    : NotImpl
      cobra:~ #
      --------------------------------------------------------------
      
      Signed-off-by: Russ Anderson (rja@sgi.com)
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      895309ff
    • John Keller's avatar
      [IA64] SN: Correctly update smp_affinty mask · c6957771
      John Keller authored
      
      
      On Altix systems, the /proc/irq/nn/smp_affinity mask is not being setup
      at device iniitalization, or updated after an interrupt redirection.
      This patch resolves those issues.
      Signed-off-by: default avatarJohn Keller <jpk@sgi.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      c6957771
    • Matthew Wilcox's avatar
      [IA64] sparse cleanups · d61b49c1
      Matthew Wilcox authored
      
      
      0/NULL confusion and some missing UL on constants.
      Signed-off-by: default avatarMatthew Wilcox <matthew@wil.cx>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      d61b49c1
    • Zou Nan hai's avatar
      [IA64] IA64 Kexec/kdump · a7956113
      Zou Nan hai authored
      
      
      Changes and updates.
      
      1. Remove fake rendz path and related code according to discuss with Khalid Aziz.
      2. fc.i offset fix in relocate_kernel.S.
      3. iospic shutdown code eoi and mask race fix from Fujitsu.
      4. Warm boot hook in machine_kexec to SN SAL code from Jack Steiner.
      5. Send slave to SAL slave loop patch from Jay Lan.
      6. Kdump on non-recoverable MCA event patch from Jay Lan
      7. Use CTL_UNNUMBERED in kdump_on_init sysctl.
      Signed-off-by: default avatarZou Nan hai <nanhai.zou@intel.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      a7956113
    • Dan Williams's avatar
      [ARM] 3995/1: iop13xx: add iop13xx support · 285f5fa7
      Dan Williams authored
      The iop348 processor integrates an Xscale (XSC3 512KB L2 Cache) core with a
      Serial Attached SCSI (SAS) controller, multi-ported DDR2 memory
      controller, 3 Application Direct Memory Access (DMA) controllers, a 133Mhz
      PCI-X interface, a x8 PCI-Express interface, and other peripherals to form
      a system-on-a-chip RAID subsystem engine.
      
      The iop342 processor replaces the SAS controller with a second Xscale core
      for dual core embedded applications.
      
      The iop341 processor is the single core version of iop342.
      
      This patch supports the two Intel customer reference platforms iq81340mc
      for external storage and iq81340sc for direct attach (HBA) development.
      
      The developer's manual is available here:
      ftp://download.intel.com/design/iio/docs/31503701.pdf
      
      
      
      Changelog:
      * removed virtual addresses from resource definitions
      * cleaned up some unnecessary #include's
      Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      285f5fa7