1. 20 Mar, 2006 2 commits
  2. 19 Mar, 2006 1 commit
    • Michael Chan's avatar
      [TG3]: 40-bit DMA workaround part 2 · 4a29cc2e
      Michael Chan authored
      
      
      The 40-bit DMA workaround recently implemented for 5714, 5715, and
      5780 needs to be expanded because there may be other tg3 devices
      behind the EPB Express to PCIX bridge in the 5780 class device.
      
      For example, some 4-port card or mother board designs have 5704 behind
      the 5714.
      
      All devices behind the EPB require the 40-bit DMA workaround.
      
      Thanks to Chris Elmquist again for reporting the problem and testing
      the patch.
      Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      4a29cc2e
  3. 11 Mar, 2006 1 commit
  4. 06 Mar, 2006 1 commit
    • Michael Chan's avatar
      [TG3]: Add DMA address workaround · 72f2afb8
      Michael Chan authored
      
      
      Add DMA workaround for chips that do not support full 64-bit DMA
      addresses.
      
      5714, 5715, and 5780 chips only support DMA addresses less than 40
      bits. On 64-bit systems with IOMMU, set the dma_mask to 40-bit so
      that pci_map_xxx() calls will map the DMA address below 40 bits if
      necessary. On 64-bit systems without IOMMU, set the dma_mask to
      64-bit and check for DMA addresses exceeding the limit in
      tg3_start_xmit().
      
      5788 only supports 32-bit DMA so need to set the mask appropriately
      also.
      
      Thanks to Chris Elmquist at SGI for reporting and helping to debug
      the problem on 5714.
      
      Thanks to David Miller for explaining the HIGHMEM and DMA stuff.
      Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      72f2afb8
  5. 03 Mar, 2006 1 commit
  6. 27 Feb, 2006 1 commit
  7. 02 Feb, 2006 2 commits
  8. 17 Jan, 2006 1 commit
    • Michael Chan's avatar
      [TG3]: Refine nvram locking · ec41c7df
      Michael Chan authored
      
      
      Add nvram lock count so that calls to tg3_nvram_lock()/unlock() can
      be nested. Add error checking to all callers of tg3_nvram_lock()
      where appropriate. To prevent nvram lock failures after halting the
      firmware, it is also necessary to release firmware's nvram lock in
      tg3_halt_cpu().
      
      Update version to 3.48.
      
      Based on David Miller's initial patch.
      Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ec41c7df
  9. 03 Jan, 2006 2 commits
  10. 28 Dec, 2005 2 commits
  11. 19 Dec, 2005 4 commits
  12. 13 Dec, 2005 4 commits
  13. 06 Dec, 2005 1 commit
  14. 29 Oct, 2005 1 commit
  15. 28 Oct, 2005 4 commits
  16. 03 Oct, 2005 2 commits
  17. 27 Sep, 2005 3 commits
    • David S. Miller's avatar
      c8a6c296
    • Michael Chan's avatar
      [TG3]: misc. fixes · f9804ddb
      Michael Chan authored
      
      
      Fix interrupt test handler by adding check for IRQ assertion in
      PCI_STATE register in addition to the status block updated bit.
      
      Add test for valid ethernet address in tg3_set_mac_addr().
      
      Add tg3_bus_string() to setup the PCI bus speed/width string for all
      PCI/PCIX/PCI Express devices. This is used to print the bus type
      during init_one().
      Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f9804ddb
    • Michael Chan's avatar
      [TG3]: 5780 PHY fixes · c94e3941
      Michael Chan authored
      
      
      Fix 5780 PHY related problems:
      
      1. MAC_RX_MODE reset must be done before setting up the MAC_MODE
         register on 5705_PLUS chips or the chip will stop receiving after
         a while. The MAC_RX_MODE reset is needed to prevent intermittently
         losing the first receive packet on serdes chips.
      
      2. Skip MAC loopback test on 5780 because of hardware errata. Normal
         traffic including PHY loopback is not affected by the errata.
      
      3. PHY loopback fails intermittently on 5708S and this is fixed by
         putting the PHY in loopback mode first before programming the MAC
         mode register. A MAC_RX_MODE reset is also added.
      
      4. Return -EINVAL in tg3_nway_reset() if device is in TBI mode. Allow
         nway_reset if 5780S is in parallel detect mode.
      
      5. Add missing PHY IDs in KNOWN_PHY_ID() macro.
      Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c94e3941
  18. 17 Sep, 2005 1 commit
    • Michael Chan's avatar
      [TG3]: Fix 4GB boundary tx handling · c58ec932
      Michael Chan authored
      
      
      Fix and simplify the workaround code for the 4GB boundary tx buffer
      hardware bug.
      
      1. Need to unmap the original SKB's dma addresses if a new SKB cannot
         be allocated.
      
      2. Need to pass the base flag to tigon3_4gb_hwbug_workaround() or TSO
         won't work properly.
      
      3. The guilty entry and length parameters for
         tigon3_4gb_hwbug_workaround() are removed as they are not necessary.
      
      4. Remove assumption that only one fragment can hit the 4GB boundary.
         Another fragment can hit 8GB for example.
      Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c58ec932
  19. 16 Sep, 2005 2 commits
  20. 12 Sep, 2005 2 commits
  21. 05 Sep, 2005 2 commits