1. 20 Mar, 2006 40 commits
    • Linus Torvalds's avatar
      Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6 · c4a1745a
      Linus Torvalds authored
      * master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: (230 commits)
        [SPARC64]: Update defconfig.
        [SPARC64]: Fix 2 bugs in huge page support.
        [SPARC64]: CONFIG_BLK_DEV_RAM fix
        [SPARC64]: Optimized TSB table initialization.
        [SPARC64]: Allow CONFIG_MEMORY_HOTPLUG to build.
        [SPARC64]: Use SLAB caches for TSB tables.
        [SPARC64]: Don't kill the page allocator when growing a TSB.
        [SPARC64]: Randomize mm->mmap_base when PF_RANDOMIZE is set.
        [SPARC64]: Increase top of 32-bit process stack.
        [SPARC64]: Top-down address space allocation for 32-bit tasks.
        [SPARC64] bbc_i2c: Fix cpu check and add missing module license.
        [SPARC64]: Fix and re-enable dynamic TSB sizing.
        [SUNSU]: Fix missing spinlock initialization.
        [TG3]: Do not try to access NIC_SRAM_DATA_SIG on Sun parts.
        [SPARC64]: First cut at VIS simulator for Niagara.
        [SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check.
        [SPARC64]: Add SMT scheduling support for Niagara.
        [SPARC64]: Fix 32-bit truncation which broke sparsemem.
        [SPARC64]: Move over to sparsemem.
        [SPARC64]: Fix new context version SMP handling.
        ...
      c4a1745a
    • Linus Torvalds's avatar
      Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/shaggy/jfs-2.6 · 88dcb911
      Linus Torvalds authored
      * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/shaggy/jfs-2.6:
        JFS: add uid, gid, and umask mount options
        JFS: Take logsync lock before testing mp->lsn
        JFS: kzalloc conversion
        JFS: Add missing file from fa3241d2
        JFS: Use the kthread_ API
        JFS: Fix regression.  fsck complains if symlinks do not have INLINEEA attribute
        JFS: ext2 inode attributes for jfs
        JFS: semaphore to mutex conversion.
        JFS: make buddy table static
        JFS: Add back directory i_size calculations for legacy partitions
      88dcb911
    • Linus Torvalds's avatar
      Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6 · c7cace64
      Linus Torvalds authored
      * 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: (150 commits)
        [PATCH] ipw2100: Update version ipw2100 stamp to 1.2.2
        [PATCH] ipw2100: move mutex.h include from ipw2100.c to ipw2100.h
        [PATCH] ipw2100: semaphore to mutexes conversion
        [PATCH] ipw2100: Fix radiotap code gcc warning
        [PATCH] ipw2100: add radiotap headers to packtes captured in monitor mode
        [PATCH] ipw2x00: expend Copyright to 2006
        [PATCH] drivers/net/wireless/ipw2200.c: fix an array overun
        [PATCH] ieee80211: Don't update network statistics from off-channel packets.
        [PATCH] ipw2200: Update ipw2200 version stamp to 1.1.1
        [PATCH] ipw2200: switch to the new ipw2200-fw-3.0 image format
        [PATCH] ipw2200: wireless extension sensitivity threshold support
        [PATCH] ipw2200: Enables the "slow diversity" algorithm
        [PATCH] ipw2200: Set a meaningful silence threshold value
        [PATCH] ipw2200: export `debug' module param only if CONFIG_IPW2200_DEBUG
        [PATCH] ipw2200: Change debug level for firmware error logging
        [PATCH] ipw2200: Filter unsupported channels out in ad-hoc mode
        [PATCH] ipw2200: Fix ipw_sw_reset() implementation inconsistent with comment
        [PATCH] ipw2200: Fix rf_kill is activated after mode change with 'disable=1'
        [PATCH] ipw2200: remove the WPA card associates to non-WPA AP checking
        [PATCH] ipw2200: Add signal level to iwlist scan output
        ...
      c7cace64
    • Linus Torvalds's avatar
      Merge branch 'block-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/block · a90779bf
      Linus Torvalds authored
      * 'block-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/block:
        [PATCH] fix rmmod problems with elevator attributes, clean them up
        [PATCH] elevator_t lifetime rules and sysfs fixes
        [PATCH] noise removal: cfq-iosched.c
        [PATCH] don't bother with refcounting for cfq_data
        [PATCH] fix sysfs interaction and lifetime rules handling for queues
        [PATCH] regularize blk_cleanup_queue() use
        [PATCH] fix cfq_get_queue()/ioprio_set(2) races
        [PATCH] deal with rmmod/put_io_context() races
        [PATCH] stop elv_unregister() from rogering other iosched's data, fix locking
        [PATCH] stop cfq from pinning queue down
        [PATCH] make cfq_exit_queue() prune the cfq_io_context for that queue
        [PATCH] fix the exclusion for ioprio_set()
        [PATCH] keep sync and async cfq_queue separate
        [PATCH] switch to use of ->key to get cfq_data by cfq_io_context
        [PATCH] stop leaking cfq_data in cfq_set_request()
        [PATCH] fix cfq hash lookups
        [PATCH] fix locking in queue_requests_store()
        [PATCH] fix double-free in blk_init_queue_node()
        [PATCH] don't do exit_io_context() until we know we won't be doing any IO
      a90779bf
    • Jeff Garzik's avatar
    • Jeff Garzik's avatar
      Merge branch 'master' · d378aca6
      Jeff Garzik authored
      d378aca6
    • David S. Miller's avatar
      [SPARC64]: Update defconfig. · ac0eb3eb
      David S. Miller authored
      
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ac0eb3eb
    • David S. Miller's avatar
      [SPARC64]: Fix 2 bugs in huge page support. · f6b83f07
      David S. Miller authored
      
      
      1) huge_pte_offset() did not check the page table hierarchy
         elements as being empty correctly, resulting in an OOPS
      
      2) Need platform specific hugetlb_get_unmapped_area() to handle
         the top-down vs. bottom-up address space allocation strategies.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f6b83f07
    • Andrew Morton's avatar
      [SPARC64]: CONFIG_BLK_DEV_RAM fix · 467418f3
      Andrew Morton authored
      
      
      init/do_mounts_rd.c depends upon CONFIG_BLK_DEV_RAM, not CONFIG_BLK_DEV_INITRD.
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      467418f3
    • David S. Miller's avatar
      [SPARC64]: Optimized TSB table initialization. · bb8646d8
      David S. Miller authored
      
      
      We only need to write an invalid tag every 16 bytes,
      so taking advantage of this can save many instructions
      compared to the simple memset() call we make now.
      
      A prefetching implementation is implemented for sun4u
      and a block-init store version if implemented for Niagara.
      
      The next trick is to be able to perform an init and
      a copy_tsb() in parallel when growing a TSB table.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      bb8646d8
    • David S. Miller's avatar
      [SPARC64]: Allow CONFIG_MEMORY_HOTPLUG to build. · 88d70794
      David S. Miller authored
      
      
      online_page() is straightforward, and then add a dummy
      remove_memory() that returns -EINVAL just like i386.
      
      There is no point in implementing remove_memory() since
      __remove_pages() has no implementation either.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      88d70794
    • David S. Miller's avatar
      9b4006dc
    • David S. Miller's avatar
      [SPARC64]: Don't kill the page allocator when growing a TSB. · b52439c2
      David S. Miller authored
      
      
      Try only lightly on > 1 order allocations.
      
      If a grow fails, we are under memory pressure, so do not try
      to grow the TSB for this address space any more.
      
      If a > 0 order TSB allocation fails on a new fork, retry using
      a 0 order allocation.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b52439c2
    • David S. Miller's avatar
    • David S. Miller's avatar
      [SPARC64]: Increase top of 32-bit process stack. · d61e16df
      David S. Miller authored
      
      
      Put it one page below the top of the 32-bit address space.
      This gives us ~16MB more address space to work with.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d61e16df
    • David S. Miller's avatar
      [SPARC64]: Top-down address space allocation for 32-bit tasks. · a91690dd
      David S. Miller authored
      
      
      Currently allocations are very constrained for 32-bit processes.
      It grows down-up from 0x70000000 to 0xf0000000 which gives about
      2GB of stack + dynamic mmap() space.
      
      So support the top-down method, and we need to override the
      generic helper function in order to deal with D-cache coloring.
      
      With these changes I was able to squeeze out a mmap() just over
      3.6GB in size in a 32-bit process.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a91690dd
    • David S. Miller's avatar
      [SPARC64] bbc_i2c: Fix cpu check and add missing module license. · b5e7ae5d
      David S. Miller authored
      
      
      Should allow cheetah_plus cpu types and don't taint
      the kernel.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b5e7ae5d
    • David S. Miller's avatar
      [SPARC64]: Fix and re-enable dynamic TSB sizing. · 7a1ac526
      David S. Miller authored
      
      
      This is good for up to %50 performance improvement of some test cases.
      The problem has been the race conditions, and hopefully I've plugged
      them all up here.
      
      1) There was a serious race in switch_mm() wrt. lazy TLB
         switching to and from kernel threads.
      
         We could erroneously skip a tsb_context_switch() and thus
         use a stale TSB across a TSB grow event.
      
         There is a big comment now in that function describing
         exactly how it can happen.
      
      2) All code paths that do something with the TSB need to be
         guarded with the mm->context.lock spinlock.  This makes
         page table flushing paths properly synchronize with both
         TSB growing and TLB context changes.
      
      3) TSB growing events are moved to the end of successful fault
         processing.  Previously it was in update_mmu_cache() but
         that is deadlock prone.  At the end of do_sparc64_fault()
         we hold no spinlocks that could deadlock the TSB grow
         sequence.  We also have dropped the address space semaphore.
      
      While we're here, add prefetching to the copy_tsb() routine
      and put it in assembler into the tsb.S file.  This piece of
      code is quite time critical.
      
      There are some small negative side effects to this code which
      can be improved upon.  In particular we grab the mm->context.lock
      even for the tsb insert done by update_mmu_cache() now and that's
      a bit excessive.  We can get rid of that locking, and the same
      lock taking in flush_tsb_user(), by disabling PSTATE_IE around
      the whole operation including the capturing of the tsb pointer
      and tsb_nentries value.  That would work because anyone growing
      the TSB won't free up the old TSB until all cpus respond to the
      TSB change cross call.
      
      I'm not quite so confident in that optimization to put it in
      right now, but eventually we might be able to and the description
      is here for reference.
      
      This code seems very solid now.  It passes several parallel GCC
      bootstrap builds, and our favorite "nut cruncher" stress test which is
      a full "make -j8192" build of a "make allmodconfig" kernel.  That puts
      about 256 processes on each cpu's run queue, makes lots of process cpu
      migrations occur, causes lots of page table and TLB flushing activity,
      incurs many context version number changes, and it swaps the machine
      real far out to disk even though there is 16GB of ram on this test
      system. :-)
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      7a1ac526
    • David S. Miller's avatar
      [SUNSU]: Fix missing spinlock initialization. · a858f1ca
      David S. Miller authored
      
      
      Caught by CONFIG_DEBUG_SPINLOCK.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a858f1ca
    • David S. Miller's avatar
      [TG3]: Do not try to access NIC_SRAM_DATA_SIG on Sun parts. · 72b845e0
      David S. Miller authored
      
      
      Sun does't put an SEEPROM behind the tigon3 chip, among other things,
      so accesses to these areas just give bus timeouts.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      72b845e0
    • David S. Miller's avatar
      [SPARC64]: First cut at VIS simulator for Niagara. · 0c51ed93
      David S. Miller authored
      
      
      Niagara does not implement some of the VIS instructions in
      hardware, so we have to emulate them.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0c51ed93
    • David S. Miller's avatar
      [SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check. · 90a6646b
      David S. Miller authored
      
      
      Report 'sun4v' when appropriate in /proc/cpuinfo
      
      Remove all the verifications of the OBP version string.  Just
      make sure it's there, and report it raw in the bootup logs and
      via /proc/cpuinfo.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      90a6646b
    • David S. Miller's avatar
      [SPARC64]: Add SMT scheduling support for Niagara. · 8935dced
      David S. Miller authored
      
      
      The mapping is a simple "(cpuid >> 2) == core" for now.
      Later we'll add more sophisticated code that will walk
      the sun4v machine description and figure this out from
      there.
      
      We should also add core mappings for jaguar and panther
      processors.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8935dced
    • David S. Miller's avatar
      [SPARC64]: Fix 32-bit truncation which broke sparsemem. · 17b0e199
      David S. Miller authored
      
      
      The page->flags manipulations done by the D-cache dirty
      state tracking was broken because the constants were not
      marked with "UL" to make them 64-bit, which means we were
      clobbering the upper 32-bits of page->flags all the time.
      
      This doesn't jive well with sparsemem which stores the
      section and indexing information in the top 32-bits of
      page->flags.
      
      This is yet another sparc64 bug which has been with us
      forever.
      
      While we're here, tidy up some things in bootmem_init()
      and paginig_init():
      
      1) Pass min_low_pfn to init_bootmem_node(), it's identical
         to (phys_base >> PAGE_SHIFT) but we should use consistent
         with the variable names we print in CONFIG_BOOTMEM_DEBUG
      
      2) max_mapnr, although no longer used, was being set
         inaccurately, we shouldn't subtract pfn_base any more.
      
      3) All the games with phys_base in the zones_*[] arrays
         we pass to free_area_init_node() are no longer necessary.
      
      Thanks to Josh Grebe and Fabbione for the bug reports
      and testing.  Fix also verified locally on an SB2500
      which had a memory layout that triggered the same problem.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      17b0e199
    • David S. Miller's avatar
      [SPARC64]: Move over to sparsemem. · d1112018
      David S. Miller authored
      
      
      This has been pending for a long time, and the fact
      that we waste a ton of ram on some configurations
      kind of pushed things over the edge.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d1112018
    • David S. Miller's avatar
      [SPARC64]: Fix new context version SMP handling. · ee29074d
      David S. Miller authored
      
      
      Don't piggy back the SMP receive signal code to do the
      context version change handling.
      
      Instead allocate another fixed PIL number for this
      asynchronous cross-call.  We can't use smp_call_function()
      because this thing is invoked with interrupts disabled
      and a few spinlocks held.
      
      Also, fix smp_call_function_mask() to count "cpus" correctly.
      There is no guarentee that the local cpu is in the mask
      yet that is exactly what this code was assuming.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ee29074d
    • David S. Miller's avatar
      [SPARC64]: Bulletproof MMU context locking. · a77754b4
      David S. Miller authored
      
      
      1) Always spin_lock_init() in init_context().  The caller essentially
         clears it out, or copies the mm info from the parent.  In both
         cases we need to explicitly initialize the spinlock.
      
      2) Always do explicit IRQ disabling while taking mm->context.lock
         and ctx_alloc_lock.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a77754b4
    • Eric Sesterhenn's avatar
      [SPARC64]: kzalloc() conversion · 9132983a
      Eric Sesterhenn authored
      
      
      this patch converts arch/sparc64 to kzalloc usage.
      Crosscompile tested with allyesconfig.
      Signed-off-by: default avatarEric Sesterhenn <snakebyte@gmx.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      9132983a
    • David S. Miller's avatar
      [SPARC64]: Fix loop termination in mark_kpte_bitmap() · f7c00338
      David S. Miller authored
      
      
      If we were aligned, but didn't have at least 256MB left
      to process, we would loop forever.
      
      Thanks to fabbione for the report and testing the fix.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f7c00338
    • David S. Miller's avatar
      [SPARC64]: Simplify TSB insert checks. · 74ae9987
      David S. Miller authored
      
      
      Don't try to avoid putting non-base page sized entries
      into the user TSB.  It actually costs us more to check
      this than it helps.
      
      Eventually we'll have a multiple TSB scheme for user
      processes.  Once a process starts using larger pages,
      we'll allocate and use such a TSB.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      74ae9987
    • David S. Miller's avatar
      [SPARC64]: More SUN4V cpu mondo bug fixing. · 3cab0c3e
      David S. Miller authored
      
      
      This cpu mondo sending interface isn't all that easy to
      use correctly...
      
      We were clearing out the wrong bits from the "mask" after getting
      something other than EOK from the hypervisor.
      
      It turns out the hypervisor can just be resent the same cpu_list[]
      array, with the 0xffff "done" entries still in there, and it will do
      the right thing.
      
      So don't update or try to rebuild the cpu_list[] array to condense it.
      
      This requires the "forward_progress" check to be done slightly
      differently, but this new scheme is less bug prone than what we were
      doing before.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      3cab0c3e
    • David S. Miller's avatar
      [SPARC64]: Fix sun4v mna winfixup handling. · bcc28ee0
      David S. Miller authored
      
      
      We were clobbering a base register before we were done
      using it.  Fix a comment typo while we're here.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      bcc28ee0
    • David S. Miller's avatar
      [SPARC64]: Fix mini RTC driver reading. · c4f8ef77
      David S. Miller authored
      
      
      Need to subtract 1900 from year and 1 from month before
      giving it back to userspace.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c4f8ef77
    • David S. Miller's avatar
      [SPARC64]: Do not allow mapping pages within 4GB of 64-bit VA hole. · 8bcd1741
      David S. Miller authored
      
      
      The UltraSPARC T1 manual recommends this because the chip
      could instruction prefetch into the VA hole, and this would
      also make decoding  certain kinds of memory access traps
      more difficult (because the chip sign extends certain pieces
      of trap state).
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8bcd1741
    • David S. Miller's avatar
      [SPARC64]: Fix _PAGE_EXEC handling. · 45f791eb
      David S. Miller authored
      
      
      First of all, use the known _PAGE_EXEC_{4U,4V} value instead
      of loading _PAGE_EXEC from memory.  We either know which one
      to use by context, or we can code patch the test.
      
      Next, we need to check executability of a PTE in the generic
      TSB miss handler.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      45f791eb
    • David S. Miller's avatar
      [SPARC64]: Fix typo in SUN4V D-TLB miss handler. · 92daa77e
      David S. Miller authored
      
      
      Should put FAULT_CODE_DTLB into %g3 not FAULT_CODE_ITLB.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      92daa77e
    • David S. Miller's avatar
      [SPARC64]: Kill bogus function externs in asm/pgtable.h · e2299045
      David S. Miller authored
      
      
      These are all implemented inline earlier in the file.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      e2299045
    • David S. Miller's avatar
    • David S. Miller's avatar
      [SPARC64]: Fix bugs in SUN4V cpu mondo dispatch. · b830ab66
      David S. Miller authored
      
      
      There were several bugs in the SUN4V cpu mondo dispatch code.
      
      In fact, if we ever got a EWOULDBLOCK or other error from
      the hypervisor call, we'd potentially send a cpu mondo multiple
      times to the same cpu and even worse we could loop until the
      timeout resending the same mondo over and over to such cpus.
      
      So let's bulletproof this thing as follows:
      
      1) Implement cpu_mondo_send() and cpu_state() hypervisor calls
         in arch/sparc64/kernel/entry.S, add prototypes to asm/hypervisor.h
      
      2) Don't build and update the cpulist using inline functions, this
         was causing the cpu mask to not get updated in the caller.
      
      3) Disable interrupts during the entire mondo send, otherwise our
         cpu list and/or mondo block could get overwritten if we take
         an interrupt and do a cpu mondo send on the current cpu.
      
      4) Check for all possible error return types from the cpu_mondo_send()
         hypervisor call.  In particular:
      
         HV_EOK) Our work is done, all cpus have received the mondo.
         HV_CPUERROR) One or more of the cpus in the cpu list we passed
                      to the hypervisor are in error state.  Use cpu_state()
                      calls over the entries in the cpu list to see which
      		ones.  Record them in "error_mask" and report this
      		after we are done sending the mondo to cpus which are
      		not in error state.
         HV_EWOULDBLOCK) We need to keep trying.
      
         Any other error we consider fatal, we report the event and exit
         immediately.
      
      5) We only timeout if forward progress is not made.  Forward progress
         is defined as having at least one cpu get the mondo successfully
         in a given cpu_mondo_send() call.  Otherwise we bump a counter
         and delay a little.  If the counter hits a limit, we signal an
         error and report the event.
      
      Also, smp_call_function_mask() error handling reports the number
      of cpus incorrectly.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b830ab66
    • David S. Miller's avatar
      [SPARC64]: Fix bugs in SMP TLB context version expiration handling. · aac0aadf
      David S. Miller authored
      
      
      1) We must flush the TLB, duh.
      
      2) Even if the sw context was seen to be valid, the local cpu's
         hw context can be out of date, so reload it unconditionally.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      aac0aadf