1. 26 Sep, 2006 2 commits
  2. 30 Aug, 2006 1 commit
  3. 02 Aug, 2006 1 commit
  4. 03 Jul, 2006 1 commit
  5. 30 Jun, 2006 1 commit
  6. 27 Jun, 2006 1 commit
  7. 26 Jun, 2006 4 commits
  8. 30 May, 2006 1 commit
  9. 09 Apr, 2006 2 commits
  10. 25 Mar, 2006 1 commit
  11. 14 Mar, 2006 1 commit
  12. 12 Mar, 2006 1 commit
    • Andi Kleen's avatar
      [PATCH] x86-64: Fix up handling of non canonical user RIPs · c33d4568
      Andi Kleen authored
      
      
      EM64T CPUs have somewhat weird error reporting for non canonical RIPs in
      SYSRET.
      
      We can't handle any exceptions there because the exception handler would
      end up running on the user stack which is unsafe.
      
      To avoid problems any code that might end up with a user touched pt_regs
      should return using int_ret_from_syscall.  int_ret_from_syscall ends up
      using IRET, which allows safe exceptions.
      
      Cc: Ernie Petrides <petrides@redhat.com>
      Signed-off-by: default avatarAndi Kleen <ak@suse.de>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      c33d4568
  13. 17 Feb, 2006 1 commit
  14. 04 Feb, 2006 2 commits
  15. 16 Jan, 2006 1 commit
  16. 11 Jan, 2006 5 commits
  17. 14 Nov, 2005 1 commit
    • Jacob Shin's avatar
      [PATCH] x86_64: Support for AMD specific MCE Threshold. · 89b831ef
      Jacob Shin authored
      
      
      MC4_MISC - DRAM Errors Threshold Register realized under AMD K8 Rev F.
      This register is used to count correctable and uncorrectable ECC errors that occur during DRAM read operations.
      The user may interface through sysfs files in order to change the threshold configuration.
      
      bank%d/error_count - reads current error count, write to clear.
      bank%d/interrupt_enable - set/clear interrupt enable.
      bank%d/threshold_limit - read/write the threshold limit.
      
      APIC vector 0xF9 in hw_irq.h.
      5 software defined bank ids in mce.h.
      new apic.c function to setup threshold apic lvt.
      defaults to interrupt off, count enabled, and threshold limit max.
      sysfs interface created on /sys/devices/system/threshold.
      
      AK: added some ifdefs to make it compile on UP
      Signed-off-by: default avatarJacob Shin <jacob.shin@amd.com>
      Signed-off-by: default avatarAndi Kleen <ak@suse.de>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      89b831ef
  18. 12 Sep, 2005 2 commits
    • Jan Beulich's avatar
      [PATCH] x86-64: Fix CFI information · 7effaa88
      Jan Beulich authored
      
      
      Being the foundation for reliable stack unwinding, this fixes CFI unwind
      annotations in many low-level x86_64 routines, plus a config option
      (available to all architectures, and also present in the previously sent
      patch adding such annotations to i386 code) to enable them separatly
      rather than only along with adding full debug information.
      Signed-off-by: default avatarJan Beulich <jbeulich@novell.com>
      Signed-off-by: default avatarAndi Kleen <ak@suse.de>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      7effaa88
    • Andi Kleen's avatar
      [PATCH] x86-64: Make remote TLB flush more scalable · e5bc8b6b
      Andi Kleen authored
      
      
      Instead of using a global spinlock to protect the state
      of the remote TLB flush use a lock and state for each sending CPU.
      
      To tell the receiver where to look for the state use 8 different
      call vectors.  Each CPU uses a specific vector to trigger flushes on other
      CPUs. Depending on the received vector the target CPUs look into
      the right per cpu variable for the flush data.
      
      When the system has more than 8 CPUs they are hashed to the 8 available
      vectors. The limited global vector space forces us to this right now.
      In future when interrupts are split into per CPU domains this could be
      fixed, at the cost of needing more IPIs in flat mode.
      
      Also some minor cleanup in the smp flush code and remove some outdated
      debug code.
      
      Requires patch to move cpu_possible_map setup earlier.
      Signed-off-by: default avatarAndi Kleen <ak@suse.de>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      e5bc8b6b
  19. 09 Sep, 2005 1 commit
  20. 07 Sep, 2005 1 commit
  21. 28 Jul, 2005 2 commits
  22. 17 May, 2005 1 commit
  23. 01 May, 2005 1 commit
  24. 16 Apr, 2005 5 commits