1. 10 Apr, 2012 1 commit
  2. 31 Oct, 2011 1 commit
    • Paul Gortmaker's avatar
      irq: don't put module.h into irq.h for tracking irqgen modules. · ec53cf23
      Paul Gortmaker authored
      Recent commit "irq: Track the  owner of irq descriptor" in
      commit ID b6873807 placed module.h into linux/irq.h
      but we are trying to limit module.h inclusion to just C files
      that really need it, due to its size and number of children
      includes.  This targets just reversing that include.
      Add in the basic "struct module" since that is all we really need
      to ensure things compile.  In theory, b6873807 should have added the
      module.h include to the irqdesc.h header as well, but the implicit
      module.h everywhere presence masked this from showing up.  So give
      it the "struct module" as well.
      As for the C files, irqdesc.c is only using THIS_MODULE, so it
      does not need module.h - give it export.h instead.  The C file
      irq/manage.c is now (as of b6873807
      ) using try_module_get and
      module_put and so it needs module.h (which it already has).
      Also convert the irq_alloc_descs variants to macros, since all
      they really do is is call the __irq_alloc_descs primitive.
      This avoids including export.h and no debug info is lost.
      Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
  3. 03 Oct, 2011 1 commit
    • Marc Zyngier's avatar
      genirq: Add support for per-cpu dev_id interrupts · 31d9d9b6
      Marc Zyngier authored
      The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
      which are usually used to connect local timers to each core. Each CPU
      has its own private interface to the GIC, and only sees the PPIs that
      are directly connect to it.
      While these timers are separate devices and have a separate interrupt
      line to a core, they all use the same IRQ number.
      For these devices, request_irq() is not the right API as it assumes
      that an IRQ number is visible by a number of CPUs (through the
      affinity setting), but makes it very awkward to express that an IRQ
      number can be handled by all CPUs, and yet be a different interrupt
      line on each CPU, requiring a different dev_id cookie to be passed
      back to the handler.
      The *_percpu_irq() functions is designed to overcome these
      limitations, by providing a per-cpu dev_id vector:
      int request_percpu_irq(unsigned int irq, irq_handler_t handler,
      		   const char *devname, void __percpu *percpu_dev_id);
      void free_percpu_irq(unsigned int, void __percpu *);
      int setup_percpu_irq(unsigned int irq, struct irqaction *new);
      void remove_percpu_irq(unsigned int irq, struct irqaction *act);
      void enable_percpu_irq(unsigned int irq);
      void disable_percpu_irq(unsigned int irq);
      The API has a number of limitations:
      - no interrupt sharing
      - no threading
      - common handler across all the CPUs
      Once the interrupt is requested using setup_percpu_irq() or
      request_percpu_irq(), it must be enabled by each core that wishes its
      local interrupt to be delivered.
      Based on an initial patch by Thomas Gleixner.
      Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
  4. 12 Sep, 2011 1 commit
  5. 28 Jul, 2011 2 commits
    • Sebastian Andrzej Siewior's avatar
      irq: Track the owner of irq descriptor · b6873807
      Sebastian Andrzej Siewior authored
      Interrupt descriptors can be allocated from modules. The interrupts
      are used by other modules, but we have no refcount on the module which
      provides the interrupts and there is no way to establish one on the
      device level as the interrupt using module is agnostic to the fact
      that the interrupt is provided by a module rather than by some builtin
      interrupt controller.
      To prevent removal of the interrupt providing module, we can track the
      owner of the interrupt descriptor, which also provides the relevant
      irq chip functions in the irq descriptor.
      request/setup_irq() can now acquire a refcount on the owner module to
      prevent unloading. free_irq() drops the refcount.
      Signed-off-by: default avatarSebastian Andrzej Siewior <sebastian@breakpoint.cc>
      Link: http://lkml.kernel.org/r/20110711101731.GA13804@Chamillionaire.breakpoint.cc
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    • Grant Likely's avatar
      irq: add irq_domain translation infrastructure · 08a543ad
      Grant Likely authored
      This patch adds irq_domain infrastructure for translating from
      hardware irq numbers to linux irqs.  This is particularly important
      for architectures adding device tree support because the current
      implementation (excluding PowerPC and SPARC) cannot handle
      translation for more than a single interrupt controller.  irq_domain
      supports device tree translation for any number of interrupt
      This patch converts x86, Microblaze, ARM and MIPS to use irq_domain
      for device tree irq translation.  x86 is untested beyond compiling it,
      irq_domain is enabled for MIPS and Microblaze, but the old behaviour is
      preserved until the core code is modified to actually register an
      irq_domain yet.  On ARM it works and is required for much of the new
      ARM device tree board support.
      PowerPC has /not/ been converted to use this new infrastructure.  It
      is still missing some features before it can replace the virq
      infrastructure already in powerpc (see documentation on
      irq_domain_map/unmap for details).  Followup patches will add the
      missing pieces and migrate PowerPC to use irq_domain.
      SPARC has its own method of managing interrupts from the device tree
      and is unaffected by this change.
      Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
  6. 07 Jul, 2011 1 commit
    • Simon Guinot's avatar
      genirq: replace irq_gc_ack() with {set,clr}_bit variants (fwd) · 659fb32d
      Simon Guinot authored
      This fixes a regression introduced by e59347a1
       "arm: orion:
      Use generic irq chip".
      Depending on the device, interrupts acknowledgement is done by setting
      or by clearing a dedicated register. Replace irq_gc_ack() with some
      {set,clr}_bit variants allows to handle both cases.
      Note that this patch affects the following SoCs: Davinci, Samsung and
      Orion. Except for this last, the change is minor: irq_gc_ack() is just
      renamed into irq_gc_ack_set_bit().
      For the Orion SoCs, the edge GPIO interrupts support is currently
      broken. irq_gc_ack() try to acknowledge a such interrupt by setting
      the corresponding cause register bit. The Orion GPIO device expect the
      opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.
      Tested on Network Space v2.
      Reported-by: default avatarJoey Oravec <joravec@drewtech.com>
      Signed-off-by: default avatarSimon Guinot <sguinot@lacie.com>
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
  7. 22 Jun, 2011 1 commit
  8. 23 Apr, 2011 4 commits
  9. 29 Mar, 2011 3 commits
  10. 28 Mar, 2011 6 commits
  11. 27 Mar, 2011 4 commits
  12. 25 Mar, 2011 1 commit
  13. 12 Mar, 2011 1 commit
    • Thomas Gleixner's avatar
      genirq: Add chip flag to force mask on suspend · d209a699
      Thomas Gleixner authored
      On suspend we disable all interrupts in the core code, but this does
      not mask the interrupt line in the default implementation as we use a
      lazy disable approach. That means we mark the interrupt disabled, but
      leave the hardware unmasked. That's an optimization because we avoid
      the hardware access for the common case where no interrupt happens
      after we marked it disabled. If an interrupt happens, then the
      interrupt flow handler masks the line at the hardware level and marks
      it pending.
      Suspend makes use of this delayed disable as it "disables" all
      interrupts when preparing the suspend transition. Right before the
      system goes into hardware suspend state it checks whether one of the
      interrupts which is marked as a wakeup interrupt came in after
      disabling it.
      Most interrupt chips have a separate register which selects the
      interrupts which can wake up the system from suspend, so we don't have
      to mask any on the non wakeup interrupts.
      But now we have to deal with brilliant designed hardware which lacks
      such a wakeup configuration facility. For such hardware it's necessary
      to mask all non wakeup interrupts before going into suspend in order
      to avoid the wakeup from random interrupts.
      Rather than working around this in the affected interrupt chip
      implementations we can solve this elegant in the core code itself.
      Add a flag IRQCHIP_MASK_ON_SUSPEND which can be set by the irq chip
      implementation to indicate, that the interrupts which are not selected
      as wakeup sources must be masked in the suspend path. Mask them in the
      loop which checks the wakeup interrupts pending flag.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Reviewed-by: default avatarAbhijeet Dharmapurikar <adharmap@codeaurora.org>
      LKML-Reference: <alpine.LFD.2.00.1103112112310.2787@localhost6.localdomain6>
  14. 19 Feb, 2011 13 commits