1. 09 Nov, 2015 1 commit
    • Dan Carpenter's avatar
      vfio/pci: make an array larger · 222e684c
      Dan Carpenter authored
      Smatch complains about a possible out of bounds error:
      	drivers/vfio/pci/vfio_pci_config.c:1241 vfio_cap_init()
      	error: buffer overflow 'pci_cap_length' 20 <= 20
      The problem is that pci_cap_length[] was defined as large enough to
      hold "PCI_CAP_ID_AF + 1" elements.  The code in vfio_cap_init() assumes
      it has PCI_CAP_ID_MAX + 1 elements.  Originally, PCI_CAP_ID_AF and
      PCI_CAP_ID_MAX were the same but then we introduced PCI_CAP_ID_EA in
      commit f80b0ba9
       ("PCI: Add Enhanced Allocation register entries")
      so now the array is too small.
      Let's fix this by making the array size PCI_CAP_ID_MAX + 1.  And let's
      make a similar change to pci_ext_cap_length[] for consistency.  Also
      both these arrays can be made const.
      Signed-off-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
      Signed-off-by: default avatarAlex Williamson <alex.williamson@redhat.com>
  2. 27 Oct, 2015 1 commit
    • Alex Williamson's avatar
      vfio/pci: Use kernel VPD access functions · 4e1a6355
      Alex Williamson authored
      The PCI VPD capability operates on a set of window registers in PCI
      config space.  Writing to the address register triggers either a read
      or write, depending on the setting of the PCI_VPD_ADDR_F bit within
      the address register.  The data register provides either the source
      for writes or the target for reads.
      This model is susceptible to being broken by concurrent access, for
      which the kernel has adopted a set of access functions to serialize
      these registers.  Additionally, commits like 932c435c ("PCI: Add
      dev_flags bit to access VPD through function 0") and 7aa6ca4d
      ("PCI: Add VPD function 0 quirk for Intel Ethernet devices") indicate
      that VPD registers can be shared between functions on multifunction
      devices creating dependencies between otherwise independent devices.
      Fortunately it's quite easy to emulate the VPD registers, simply
      storing copies of the address and data registers in memory and
      triggering a VPD read or write on writes to the address register.
      This allows vfio users to avoid seeing spurious register changes from
      accesses on other devices and enables the use of shared quirks in the
      host kernel.  We can theoretically still race with access through
      sysfs, but the window of opportunity is much smaller.
      Signed-off-by: default avatarAlex Williamson <alex.williamson@redhat.com>
      Acked-by: default avatarMark Rustad <mark.d.rustad@intel.com>
  3. 07 Nov, 2014 1 commit
  4. 25 Sep, 2014 1 commit
  5. 30 May, 2014 1 commit
  6. 17 Dec, 2013 1 commit
  7. 04 Sep, 2013 1 commit
  8. 15 Apr, 2013 1 commit
  9. 01 Apr, 2013 2 commits
  10. 15 Mar, 2013 1 commit
  11. 18 Feb, 2013 1 commit
    • Alex Williamson's avatar
      vfio-pci: Manage user power state transitions · 2dd11948
      Alex Williamson authored
      We give the user access to change the power state of the device but
      certain transitions result in an uninitialized state which the user
      cannot resolve.  To fix this we need to mark the PowerState field of
      the PMCSR register read-only and effect the requested change on behalf
      of the user.  This has the added benefit that pdev->current_state
      remains accurate while controlled by the user.
      The primary example of this bug is a QEMU guest doing a reboot where
      the device it put into D3 on shutdown and becomes unusable on the next
      boot because the device did a soft reset on D3->D0 (NoSoftRst-).
      Signed-off-by: default avatarAlex Williamson <alex.williamson@redhat.com>
  12. 14 Feb, 2013 2 commits
  13. 31 Jul, 2012 1 commit
    • Alex Williamson's avatar
      vfio: Add PCI device driver · 89e1f7d4
      Alex Williamson authored
      Add PCI device support for VFIO.  PCI devices expose regions
      for accessing config space, I/O port space, and MMIO areas
      of the device.  PCI config access is virtualized in the kernel,
      allowing us to ensure the integrity of the system, by preventing
      various accesses while reducing duplicate support across various
      userspace drivers.  I/O port supports read/write access while
      MMIO also supports mmap of sufficiently sized regions.  Support
      for INTx, MSI, and MSI-X interrupts are provided using eventfds to
      Signed-off-by: default avatarAlex Williamson <alex.williamson@redhat.com>