1. 15 Jul, 2008 1 commit
    • Haavard Skinnemoen's avatar
      atmel-mci: Driver for Atmel on-chip MMC controllers · 7d2be074
      Haavard Skinnemoen authored
      This is a driver for the MMC controller on the AP7000 chips from
      Atmel. It should in theory work on AT91 systems too with some
      tweaking, but since the DMA interface is quite different, it's not
      entirely clear if it's worth merging this with the at91_mci driver.
      
      This driver has been around for a while in BSPs and kernel sources
      provided by Atmel, but this particular version uses the generic DMA
      Engine framework (with the slave extensions) instead of an
      avr32-only DMA controller framework.
      
      This driver can also use PIO transfers when no DMA channels are
      available, and for transfers where using DMA may be difficult or
      impractical for some reason (e.g. the DMA setup overhead is usually
      not worth it for very short transfers, and badly aligned buffers or
      lengths are difficult to handle.)
      
      Currently, the driver only support PIO transfers. DMA support has been
      split out to a separate patch to hopefully make it easier to review.
      
      The driver has been tested using mmc-block and ext3fs on several SD,
      SDHC and MMC+ cards. Reads and writes work fine, with read transfer
      rates up to 3.5 MiB/s on fast cards with debugging disabled.
      
      The driver has also been tested using the mmc_test module on the same
      cards. All tests except 7, 9, 15 and 17 succeed. The first two are
      unsupported by all the cards I have, so I don't know if the driver
      handles this correctly. The last two fail because the hardware flags a
      Data CRC Error instead of a Data Timeout error. I'm not sure how to deal
      with that.
      
      Documentation for this controller can be found in many data sheets from
      Atmel, including the AT32AP7000 data sheet which can be found here:
      
      http://www.atmel.com/dyn/products/datasheets.asp?family_id=682Signed-off-by: default avatarHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      Signed-off-by: default avatarPierre Ossman <drzeus@drzeus.cx>
      7d2be074
  2. 02 Jul, 2008 2 commits
  3. 28 Jun, 2008 1 commit
  4. 27 Jun, 2008 5 commits
  5. 19 Apr, 2008 3 commits
    • Hans-Christian Egtvedt's avatar
      avr32: Implement set_rate(), set_parent() and mode() for pll1 · 35bf50cc
      Hans-Christian Egtvedt authored
      This patch is a take two of adding full functionality to PLL1 on
      AT32AP7000.  This allows board-specific code and drivers to configure
      and enable PLL1. This is useful when precise control over the
      frequency of e.g. a genclock is needed and requested by users for the
      ABDAC device.
      
      The patch is based upon previous patches from both Haavard Skinnemoen
      and David Brownell.
      Signed-off-by: default avatarHans-Christian Egtvedt <hcegtvedt@atmel.com>
      Signed-off-by: default avatarHaavard Skinnemoen <hskinnemoen@atmel.com>
      35bf50cc
    • David Brownell's avatar
      avr32: Generic clockevents support · e723ff66
      David Brownell authored
      This combines three patches from David Brownell:
        * avr32: tclib support
        * avr32: simplify clocksources
        * avr32: Turn count/compare into a oneshot clockevent device
      
      Register both TC blocks (instead of just the first one) so that
      the AT32/AT91 tclib code will pick them up (instead of just the
      avr32-only PIT-style clocksource).
      
      Rename the first one and its resources appropriately.
      
      More cleanups to the cycle counter clocksource code
      
       - Disable all the weak symbol magic; remove the AVR32-only TCB-based
         clocksource code (source and header).
      
       - Mark the __init code properly.
      
       - Don't forget to report IRQF_TIMER.
      
       - Make the system work properly with this clocksource, by preventing
         use of the CPU "idle" sleep state in the idle loop when it's used.
      
      Package the avr32 count/compare timekeeping support as a oneshot
      clockevent device, so it supports NO_HZ and high res timers.
      This means it also supports plugging in other clockevent devices
      and clocksources.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: default avatarHaavard Skinnemoen <hskinnemoen@atmel.com>
      e723ff66
    • Ben Nizette's avatar
      avr32: pass i2c board info through at32_add_device_twi · 040b28fc
      Ben Nizette authored
      New-style I2C drivers require that motherboard-mounted I2C devices are
      registered with the I2C core, typically at arch_initcall time.  This
      can be done nice and neat by passing the struct i2c_board_info[]
      through at32_add_device_twi just like we do for the SPI board info.
      
      While we've got the hood up, remove a duplicate declaration of
      at32_add_device_twi() in board.h.
      
      [hskinnemoen@atmel.com: add missing i2c_board_info forward-declaration]
      Signed-Off-By: default avatarBen Nizette <bn@niasdigital.com>
      Signed-off-by: default avatarHaavard Skinnemoen <hskinnemoen@atmel.com>
      040b28fc
  6. 06 Apr, 2008 1 commit
  7. 08 Feb, 2008 1 commit
  8. 25 Jan, 2008 2 commits
  9. 15 Nov, 2007 2 commits
  10. 23 Oct, 2007 3 commits
  11. 11 Oct, 2007 2 commits
  12. 18 Jul, 2007 3 commits
  13. 23 Jun, 2007 1 commit
  14. 15 May, 2007 1 commit
  15. 27 Apr, 2007 3 commits
  16. 07 Mar, 2007 1 commit
  17. 16 Feb, 2007 2 commits
  18. 09 Feb, 2007 4 commits
  19. 08 Dec, 2006 2 commits