1. 16 Feb, 2007 24 commits
  2. 07 Feb, 2007 16 commits
    • Mark Lord's avatar
      IDE Driver for Delkin/Lexar/etc.. cardbus CF adapter · 78281c53
      Mark Lord authored
      On Thursday 11 January 2007 23:17, Bartlomiej Zolnierkiewicz wrote:
      > 
      > My working IDE tree (against Linus' tree) now resides here:
      > 
      > 	http://kernel.org/pub/linux/kernel/people/bart/pata-2.6/patches/
      
      
      
      Bart, here's a driver I've been keeping out-of-tree for the past couple
      of years.  This is for the Delking/Lexar/ASKA/etc.. 32-bit cardbus IDE
      CompactFlash adapter card.
      
      It's probably way out of sync with the latest driver model (??), but it
      still builds/works.  I'm not interested in doing much of a rewrite, other
      than for libata someday, as I no longer use the card myself.
      
      But lots of other people do seem to use it, so it might be nice to see it
      "in-tree".
      Signed-off-by: default avatarMark Lord <mlord@pobox.com>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      78281c53
    • Bartlomiej Zolnierkiewicz's avatar
      ide: it8213 IDE driver update (version 2) · 67881826
      Bartlomiej Zolnierkiewicz authored
      
      
      * set ATAPI/IORDY/TIME bits correctly in it8213_tuneproc()
      * fix UDMA/MWDMA/SWDMA masks in it8213_init_hwif()
      * in it8213_tune_chipset() SWDMA2 mode should be used instead of MWDMA0
      * backport various fixes from piix/slc90e66 drivers:
        - in it8213_tuneproc() the highest possible PIO mode is PIO4 (not PIO5)
        - clear ATAPI/IORDY/TIME bits before setting them also for slave device
        - use ->speedproc in it8213_config_drive_for_dma()
        - don't try to tune PIO in config_chipset_for_pio()
        - simplify is_slave calculation in it8213_tuneproc()
        - misc cleanups
      * fix it8213_ratemask() and it8213_tuneproc() comments
      * simplify it8213_init_hwif()
      * remove init_chipset_it8213()
      * add missing Copyrights and update MODULE_AUTHOR()
      * CodingStyle cleanups
      * remove dead code
      
      v2:
      * PCI_DEVICE_ID_ITE_8213 is only defined in -mm kernels,
        so just use PCI Device ID (0x8213) directly
      * fix ->ultra_mask incorrectly changed to 0x3f in v1 version of the patch
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      67881826
    • Jack Lee's avatar
      ide: add it8213 IDE driver · 9c6712c0
      Jack Lee authored
      
      
      From: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      9c6712c0
    • Bartlomiej Zolnierkiewicz's avatar
    • Andrew Morton's avatar
      tc86c001: mark init_chipset_tc86c001() with __devinit tag · ba59c4b8
      Andrew Morton authored
      
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: Adrian Bunk <bunk@stusta.de>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      ba59c4b8
    • Adrian Bunk's avatar
      tc86c001: init_hwif_tc86c001() can be static · e8ab7f53
      Adrian Bunk authored
      
      Signed-off-by: default avatarAdrian Bunk <bunk@stusta.de>
      Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      e8ab7f53
    • Sergei Shtylyov's avatar
      ide: add Toshiba TC86C001 IDE driver (take 2) · 33dced2e
      Sergei Shtylyov authored
      
      
      This is the driver for the Toshiba TC86C001 GOKU-S PCI IDE controller,
      completely reworked from the original brain-damaged Toshiba's 2.4 version.
      
      This single channel UltraDMA/66 controller is very simple in programming,
      yet Toshiba managed to plant many interesting bugs in it.  The particularly
      nasty "limitation 5" (as they call the errata) caused me to abuse the IDE
      core in a possibly most interesting way so far.  However, this is still
      better than the #ifdef mess in drivers/ide/ide-io.c that the original
      version included (well, it had much more mess)...
      Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
      Acked-by: default avatarAlan Cox <alan@redhat.com>
      Cc: Greg KH <greg@kroah.com>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      33dced2e
    • Sergei Shtylyov's avatar
      pdc202xx_new: remove check_in_drive_lists abomination · d24ec426
      Sergei Shtylyov authored
      
      
      Fold check_in_drive_lists() into quirkproc() handler in both PDC202xx
      drivers-- this function was never called with a list other than
      pdc_quirk_drives and was a bad example of code overall...
      Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      d24ec426
    • Sergei Shtylyov's avatar
      pdc202xx_new: remove useless code · 27210314
      Sergei Shtylyov authored
      
      
      Remove the following useless fragments from the driver:
      
      - the ide_dma_lostirq() and ide_dma_timeout() handlers which boil down to just
        printing the incoherent reset message and calling their default counterparts;
      
      - check for non-NULL drive->id in the ide_dma_check() handler -- this is assumed
        to be true by all other handlers (also, get rid of unnecessary nesting of the
        conditional statements there);
      
      - the comment before pdcnew_tune_drive() which has nothing to do with the code.
      Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      27210314
    • Sergei Shtylyov's avatar
      slc90e66: carry over fixes from piix driver · 24e6458d
      Sergei Shtylyov authored
      
      
      Synchronize with version 0.46 of the Intel PIIX/ICH driver:
      
      - carry over Alan's and my own fixes in the tuneproc() method and my cleanups
        both there and in the ratemask() method;
      
      - SLC90E66 only supports MW DMA modes 1/2 and SW DMA mode 2 (just like Intel
        chips), so don't claim support for other MW/SW DMA modes;
      
      - don't check dor non-NULL drive->id in the ide_dma_check() method -- this is
        assumed to be true in all other drivers;
      
      - do some coding/formatting cleanups while at it...
      Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      24e6458d
    • Sergei Shtylyov's avatar
      piix: tuneproc() fixes/cleanups · 30dfd12f
      Sergei Shtylyov authored
      
      
      Fix/cleanup the driver's tuneproc() and ratemask() methods:
      
      - PPE, IE, and TIME bits need to be cleared beforehand for the slave drive as
        well as master (Alan probably just forgot about it);
      
      - this driver only supports PIO modes up to 4, so must pass the correct limit
        to ide_get_best_pio_mode();
      
      - use min_t() macro instead of min();
      
      - simplify slave vs master drive evaluation;
      
      - do come coding and formatting cleanups...
      Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      30dfd12f
    • Sergei Shtylyov's avatar
      piix: fix 82371MX enablebits · d2872239
      Sergei Shtylyov authored
      
      
      According to the datasheet, Intel 82371MX (MPIIX) actually has only a
      single IDE channel mapped to the primary or secondary ports depending on
      the value of the bit 14 of the IDETIM register at PCI config.  offset 0x6C
      (the register at 0x6F which the driver refers to.  doesn't exist).  So,
      disguise the controller as dual channel and set enablebits masks/values
      such that only either primary or secondary channel is detected enabled. 
      Also, preclude the IDE probing code from reading PCI BARs, this controller
      just doesn't have them (it's not the separate PCI function like the other
      PCI controllers), it only decodes the legacy addresses.
      
      [ Alan sayeth " MPIIX does not work with or without the change.  It needs its
        own different driver and not to use setup-pci.  Huge job and since it works
        well with libata who cares.  Ditto the early PIIX chip." ]
      Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      d2872239
    • Sergei Shtylyov's avatar
      hpt366: HPT36x PCI clock detection fix · 6273d26a
      Sergei Shtylyov authored
      
      
      Fix minor coding mistake in the HPT36x PCI clock detection code noticed by
      Bartlomiej Zolnierkiewicz -- it always reported 33 MHz due to the missing
      'break' statements.  This, however, most probably never mattered -- in fact, I
      was thinking of removing the 25/40 MHz cases completely since HPT36x BIOSes
      didn't seem to set any other value than 7 into the 'cmd_high_time' field, i.e.
       supported only 33 MHz PCI.
      
      Note that in the original driver there was another bug: 25 and 40 MHz cases
      were interchanged.  Since the 'cmd_high_time' field is in units of PCI clocks,
      a lower clock count just *cannot* correspond to a higher frequency, i.  e.  it
      should be 5 for 25 MHz PCI and 9 for 40 MHz PCI, not the other way around.
      Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      6273d26a
    • Sergei Shtylyov's avatar
      hpt366: init code rewrite · 7b73ee05
      Sergei Shtylyov authored
      
      
      Finally, rework the driver init.  code to correctly handle all the chip
      variants HighPoint has created so far.  This should cure the rest of the
      timing issues in the driver (especially, on 66 MHz PCI) caused by the
      HighPoint's habit of switching the base DPLL clock with every new revision
      of the chips...
      
        - switch to using the enumeration type to differ between the numerous chip
          variants, matching PCI device/revision ID with the chip type early, at the
          init_setup stage;
      
        - extend the hpt_info structure to hold the DPLL and PCI clock frequencies,
          stop duplicating it for each channel by storing the pointer in the pci_dev
          structure: first, at the init_setup stage, point it to a static "template"
          with only the chip type and its specific base DPLL frequency, the highest
          supported DMA mode, and the chip settings table pointer filled, then, at
          the init_chipset stage, allocate per-chip instance  and fill it with the
          rest of the necessary information;
      
        - get rid of the constant thresholds in the HPT37x PCI clock detection code,
          switch  to calculating  PCI clock frequency based on the chip's base DPLL
          frequency;
      
        - switch to using the DPLL clock and enable UltraATA/133 mode by default on
          anything newer than HPT370/A;
      
        - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(),
          unify the HPT36x/37x setup code and the speedproc handlers by joining the
          register setting lists into the table indexed by the clock selected;
      
        - add enablebits for all the chips to avoid touching disabled channels
          (though the HighPoint BIOS seem to only disable the primary one on
          HPT371/N);
      
        - separate the UltraDMA and MWDMA masks there to avoid changing PIO timings
          when setting an UltraDMA mode in hpt37x_tune_chipset().
      
      This version has been tested on HPT370/302/371N.
      
      Thanks to Alan for the inspiration. Hopefully, his libata driver will also
      benefit from the work done on this "obsolete" driver...
      Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      7b73ee05
    • Sergei Shtylyov's avatar
      hpt366: clean up DMA timeout handling for HPT370 · 4bf63de2
      Sergei Shtylyov authored
      
      
      Clean up DMA timeout handling for HPT370:
      
      - hpt370_lostirq_timeout() cleared the DMA status which made __ide_dma_end()
         called afterwards return the incorrect result, and the DMA engine was reset
         both before and after stopping DMA while the HighPoint drivers only do it
         after (which seems logical) -- fix this and also rename the function;
      
      - get rid of the needless mutual recursion in hpt370_ide_dma_end() and
         hpt370_ide_dma_timeout();
      
      - get rid of hpt370_lostirq_timeout() since hwif->ide_dma_end() called from
         the driver's interrupt handler later does all its work.
      Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      4bf63de2
    • Sergei Shtylyov's avatar
      hpt366: merge HPT37x speedproc handlers · 26ccb802
      Sergei Shtylyov authored
      
      
      Continue with the driver rewrite:
      
      - move the interrupt twiddling code from the speedproc handlers into the
          init_hwif_hpt366 which allows to merge the two HPT37x speedproc handlers
          into one;
      
      - get rid of in init_hpt366 which solely consists of the duplicate code, then
          fold init_hpt37x() into init_chipset_hpt366();
      
      - fix hpt3xx_tune_drive() to always set the PIO mode requested, not the best
          possible one, change hpt366_config_drive_xfer_rate() accordingly, simplify
          it a bit;
      
      - group all the DMA related code together init_hwif_hpt366(), and generally
          clean up and beautify it.
      Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      26ccb802