1. 21 Dec, 2010 1 commit
    • Magnus Damm's avatar
      ARM: mach-shmobile: sh73a0 INTCS support · 5f53a56a
      Magnus Damm authored
      Add INTCS support for the sh73a0 processor.
      The interrupts on the sh73a0 processor are managed
      through controllers such as GIC, INTCS and INTCA.
      The ARM cores use the GIC as primary interrupt
      controller and the INTCS and INTCA are hanging off
      the GIC as cascaded interrupt controllers.
      Peripherals connected both to the GIC and the INTC
      controllers should if possible only use the GIC.
      If no GIC connection is available then INTCS and
      INTCA may be used instead.
      Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
  2. 20 Dec, 2010 1 commit
  3. 17 Dec, 2010 2 commits
    • Magnus Damm's avatar
      ARM: mach-shmobile: INTC interrupt priority level demux fix · 1cf215a5
      Magnus Damm authored
      Fix interrupt priority level handling on SH-Mobile ARM.
      SH-Mobile ARM platforms using multiple interrupt priority
      levels need this patch to fix a potential dead lock that
      may occur if multiple interrupts with different levels
      are pending simultaneously.
      The default INTC configuration is to use the same priority
      level for all interrupts, so this issue does not trigger by
      default. It is however common for board code to override the
      interrupt priority for certain interrupt sources depending
      on the application. Without this fix such boards may lock up.
      In detail, this patch updates the INTC code in entry-macro.S
      to make sure that the INTLVLA register gets set as expected.
      To trigger this bug modify the board specific code to adjust
      the interrupt priority level for the ethernet chip. After
      changing the priority level simply use flood ping to drown
      the board with interrupts.
      This patch applies to INTCA-based processors such as sh7372,
      sh7377 and sh7372. GIC-based processors are not affected.
      Suitable for v2.6.37-rc and stable from v2.6.34 to v2.6.36.
      Cc: stable@kernel.org
      Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
      Tested-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
    • Magnus Damm's avatar
      ARM: mach-shmobile: fix compile warning in mm/init.c · 676b14c3
      Magnus Damm authored
      Turn down the warning noise from the compiler,
      basically a SH-Mobile specific version of the
      patch located in the RMK patch tracker:
      6484/1: "fix compile warning in mm/init.c",
      Without this patch the following warning triggers:
       CC      arch/arm/kernel/sys_arm.o
      arch/arm/mm/init.c: In function 'mem_init':
      arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int'
        CC      arch/arm/kernel/traps.o
      Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
  4. 15 Dec, 2010 4 commits
    • Rusty Russell's avatar
      lguest: populate initial_page_table · da32dac1
      Rusty Russell authored
      Two x86 patches broke lguest:
      1) v2.6.35-492-g72d7c3b3, which changed x86 to use the memblock allocator.
      In lguest, the host places linear page tables at the top of mem, which
      used to be enough to get us up to the swapper_pg_dir page tables.  With
      the first patch, the direct mapping tables used that memory:
      Before: kernel direct mapping tables up to 4000000 @ 7000-1a000
      After: kernel direct mapping tables up to 4000000 @ 3fed000-4000000
      I initially fixed this by lying about the amount of memory we had, so
      the kernel wouldn't blatt the lguest boot pagetables (yuk!), but then...
      2) v2.6.36-rc8-54-gb40827fa, which made x86 boot use initial_page_table.
      This was initialized in a part of head_32.S which isn't executed by
      lguest; it is then copied into swapper_pg_dir.  So we have to initialize
      it; and anyway we switch to it before we blatt the old tables, so that
      fixes the previous damage as well.
      For the moment, I cut & pasted the code into lguest's boot code, but
      next merge window I will merge them.
      Signed-off-by: default avatarRusty Russell <rusty@rustcorp.com.au>
      Cc: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      To: x86@kernel.org
    • Rusty Russell's avatar
      lguest: restore boot speed · bb4093de
      Rusty Russell authored
      lguest is dumb and drops *all* the pagetables for set_pte (which is
      only used for kernel mapping manipulation, so it's OK without highmem).
      But it's used a lot in boot, too.  As a guest optimization, we
      suppressed this flushing until the first page switch.  Now we have
      initial_page_table, that happens much earlier, so extend the heuristic
      to wait until we switch to something other than the swapper_pg_dir or
      As measured on my laptop under kvm, this dropped the time-to-mount-root
      from 48 seconds to 4.3 seconds.
      Signed-off-by: default avatarRusty Russell <rusty@rustcorp.com.au>
    • Rusty Russell's avatar
      lguest: fix crash lguest_time_init · bb6f1d9a
      Rusty Russell authored
      fe25c7fc "x86: lguest: Convert to new irq chip functions" converted
      enable_lguest_irq() to take a struct irq_data *, but didn't fix the one
      internal caller.
      Signed-off-by: default avatarRusty Russell <rusty@rustcorp.com.au>
      To: x86@kernel.org
    • Randy Dunlap's avatar
      crypto: ghash-intel - ghash-clmulni-intel_glue needs err.h · 52f6c5ad
      Randy Dunlap authored
      Add missing header file:
      arch/x86/crypto/ghash-clmulni-intel_glue.c:256: error: implicit declaration of function 'IS_ERR'
      arch/x86/crypto/ghash-clmulni-intel_glue.c:257: error: implicit declaration of function 'PTR_ERR'
      Signed-off-by: default avatarRandy Dunlap <randy.dunlap@oracle.com>
      Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
  5. 14 Dec, 2010 5 commits
  6. 12 Dec, 2010 5 commits
  7. 10 Dec, 2010 1 commit
    • Paul Walmsley's avatar
      OMAP2: PRCM: fix some SHIFT macros that were actually bitmasks · c2015dc8
      Paul Walmsley authored
      After Charu's GPIO hwmod patches, GPIO initialization on N800 emits
      the following messages for all GPIO banks:
      omap_hwmod: gpio1: cannot be enabled (3)
      This is due to OMAP24XX_ST_GPIOS_SHIFT being defined as a bitmask.
      Fix this and also fix two other macros that had the same problem.
      Thanks to Tony Lindgren <tony@atomide.com> for originally reporting
      this bug.
      Signed-off-by: Paul Walmsley <paul@pwsan.com
      Cc: Charulatha Varadarajan <charu@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
  8. 09 Dec, 2010 2 commits
  9. 08 Dec, 2010 1 commit
  10. 07 Dec, 2010 3 commits
  11. 06 Dec, 2010 4 commits
  12. 04 Dec, 2010 4 commits
  13. 03 Dec, 2010 3 commits
  14. 02 Dec, 2010 4 commits