1. 18 Jul, 2014 5 commits
  2. 17 Jul, 2014 5 commits
  3. 10 Jul, 2014 8 commits
    • Mark Rutland's avatar
      arm64: Enable TEXT_OFFSET fuzzing · da57a369
      Mark Rutland authored
      The arm64 Image header contains a text_offset field which bootloaders
      are supposed to read to determine the offset (from a 2MB aligned "start
      of memory" per booting.txt) at which to load the kernel. The offset is
      not well respected by bootloaders at present, and due to the lack of
      variation there is little incentive to support it. This is unfortunate
      for the sake of future kernels where we may wish to vary the text offset
      (even zeroing it).
      This patch adds options to arm64 to enable fuzz-testing of text_offset.
      CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET forces the text offset to a random
      16-byte aligned value value in the range [0..2MB) upon a build of the
      kernel. It is recommended that distribution kernels enable randomization
      to test bootloaders such that any compliance issues can be fixed early.
      Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
      Acked-by: default avatarTom Rini <trini@ti.com>
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    • Mark Rutland's avatar
      arm64: Update the Image header · a2c1d73b
      Mark Rutland authored
      Currently the kernel Image is stripped of everything past the initial
      stack, and at runtime the memory is initialised and used by the kernel.
      This makes the effective minimum memory footprint of the kernel larger
      than the size of the loaded binary, though bootloaders have no mechanism
      to identify how large this minimum memory footprint is. This makes it
      difficult to choose safe locations to place both the kernel and other
      binaries required at boot (DTB, initrd, etc), such that the kernel won't
      clobber said binaries or other reserved memory during initialisation.
      Additionally when big endian support was added the image load offset was
      overlooked, and is currently of an arbitrary endianness, which makes it
      difficult for bootloaders to make use of it. It seems that bootloaders
      aren't respecting the image load offset at present anyway, and are
      assuming that offset 0x80000 will always be correct.
      This patch adds an effective image size to the kernel header which
      describes the amount of memory from the start of the kernel Image binary
      which the kernel expects to use before detecting memory and handling any
      memory reservations. This can be used by bootloaders to choose suitable
      locations to load the kernel and/or other binaries such that the kernel
      will not clobber any memory unexpectedly. As before, memory reservations
      are required to prevent the kernel from clobbering these locations
      Both the image load offset and the effective image size are forced to be
      little-endian regardless of the native endianness of the kernel to
      enable bootloaders to load a kernel of arbitrary endianness. Bootloaders
      which wish to make use of the load offset can inspect the effective
      image size field for a non-zero value to determine if the offset is of a
      known endianness. To enable software to determine the endinanness of the
      kernel as may be required for certain use-cases, a new flags field (also
      little-endian) is added to the kernel header to export this information.
      The documentation is updated to clarify these details. To discourage
      future assumptions regarding the value of text_offset, the value at this
      point in time is removed from the main flow of the documentation (though
      kept as a compatibility note). Some minor formatting issues in the
      documentation are also corrected.
      Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
      Acked-by: default avatarTom Rini <trini@ti.com>
      Cc: Geoff Levand <geoff@infradead.org>
      Cc: Kevin Hilman <kevin.hilman@linaro.org>
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    • Mark Rutland's avatar
      arm64: place initial page tables above the kernel · bd00cd5f
      Mark Rutland authored
      Currently we place swapper_pg_dir and idmap_pg_dir below the kernel
      image, between PHYS_OFFSET and (PHYS_OFFSET + TEXT_OFFSET). However,
      bootloaders may use portions of this memory below the kernel and we do
      not parse the memory reservation list until after the MMU has been
      enabled. As such we may clobber some memory a bootloader wishes to have
      To enable the use of all of this memory by bootloaders (when the
      required memory reservations are communicated to the kernel) it is
      necessary to move our initial page tables elsewhere. As we currently
      have an effectively unbound requirement for memory at the end of the
      kernel image for .bss, we can place the page tables here.
      This patch moves the initial page table to the end of the kernel image,
      after the BSS. As they do not consist of any initialised data they will
      be stripped from the kernel Image as with the BSS. The BSS clearing
      routine is updated to stop at __bss_stop rather than _end so as to not
      clobber the page tables, and memory reservations made redundant by the
      new organisation are removed.
      Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
      Tested-by: default avatarLaura Abbott <lauraa@codeaurora.org>
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    • Mark Rutland's avatar
      arm64: head.S: remove unnecessary function alignment · 909a4069
      Mark Rutland authored
      Currently __turn_mmu_on is aligned to 64 bytes to ensure that it doesn't
      span any page boundary, which simplifies the idmap and spares us
      requiring an additional page table to map half of the function. In
      keeping with other important requirements in architecture code, this
      fact is undocumented.
      Additionally, as the function consists of three instructions totalling
      12 bytes with no literal pool data, a smaller alignment of 16 bytes
      would be sufficient.
      This patch reduces the alignment to 16 bytes and documents the
      underlying reason for the alignment. This reduces the required alignment
      of the entire .head.text section from 64 bytes to 16 bytes, though it
      may still be aligned to a larger value depending on TEXT_OFFSET.
      Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
      Tested-by: default avatarLaura Abbott <lauraa@codeaurora.org>
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    • AKASHI Takahiro's avatar
      arm64: audit: Add audit hook in syscall_trace_enter/exit() · 5701ede8
      AKASHI Takahiro authored
      This patch adds auditing functions on entry to or exit from
      every system call invocation.
      Acked-by: default avatarRichard Guy Briggs <rgb@redhat.com>
      Acked-by Will Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarAKASHI Takahiro <takahiro.akashi@linaro.org>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    • Catalin Marinas's avatar
      arm64: Add __NR_* definitions for compat syscalls · f3e5c847
      Catalin Marinas authored
      This patch adds __NR_* definitions to asm/unistd32.h, moves the
      __NR_compat_* definitions to asm/unistd.h and removes all the explicit
      unistd32.h includes apart from the one building the compat syscall
      table. The aim is to have the compat __NR_* definitions available but
      without colliding with the native syscall definitions (required by
      lib/compat_audit.c to avoid duplicating the audit header files between
      native and compat).
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    • Larry Bassel's avatar
      arm64: enable context tracking · 6c81fe79
      Larry Bassel authored
      Make calls to ct_user_enter when the kernel is exited
      and ct_user_exit when the kernel is entered (in el0_da,
      el0_ia, el0_svc, el0_irq and all of the "error" paths).
      These macros expand to function calls which will only work
      properly if el0_sync and related code has been rearranged
      (in a previous patch of this series).
      The calls to ct_user_exit are made after hw debugging has been
      enabled (enable_dbg_and_irq).
      The call to ct_user_enter is made at the beginning of the
      kernel_exit macro.
      This patch is based on earlier work by Kevin Hilman.
      Save/restore optimizations were also done by Kevin.
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Reviewed-by: default avatarKevin Hilman <khilman@linaro.org>
      Tested-by: default avatarKevin Hilman <khilman@linaro.org>
      Signed-off-by: default avatarLarry Bassel <larry.bassel@linaro.org>
      Signed-off-by: default avatarKevin Hilman <khilman@linaro.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    • Larry Bassel's avatar
      arm64: adjust el0_sync so that a function can be called · 6ab6463a
      Larry Bassel authored
      To implement the context tracker properly on arm64,
      a function call needs to be made after debugging and
      interrupts are turned on, but before the lr is changed
      to point to ret_to_user(). If the function call
      is made after the lr is changed the function will not
      return to the correct place.
      For similar reasons, defer the setting of x0 so that
      it doesn't need to be saved around the function call
      (save far_el1 in x26 temporarily instead).
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Reviewed-by: default avatarKevin Hilman <khilman@linaro.org>
      Tested-by: default avatarKevin Hilman <khilman@linaro.org>
      Signed-off-by: default avatarLarry Bassel <larry.bassel@linaro.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
  4. 09 Jul, 2014 2 commits
  5. 04 Jul, 2014 1 commit
  6. 18 Jun, 2014 4 commits
  7. 30 May, 2014 1 commit
    • Lorenzo Pieralisi's avatar
      arm64: kernel: initialize broadcast hrtimer based clock event device · 9358d755
      Lorenzo Pieralisi authored
      On platforms implementing CPU power management, the CPUidle subsystem
      can allow CPUs to enter idle states where local timers logic is lost on power
      down. To keep the software timers functional the kernel relies on an
      always-on broadcast timer to be present in the platform to relay the
      interrupt signalling the timer expiries.
      For platforms implementing CPU core gating that do not implement an always-on
      HW timer or implement it in a broken way, this patch adds code to initialize
      the kernel hrtimer based clock event device upon boot (which can be chosen as
      tick broadcast device by the kernel).
      It relies on a dynamically chosen CPU to be always powered-up. This CPU then
      relays the timer interrupt to CPUs in deep-idle states through its HW local
      timer device.
      Having a CPU always-on has implications on power management platform
      capabilities and makes CPUidle suboptimal, since at least a CPU is kept
      always in a shallow idle state by the kernel to relay timer interrupts,
      but at least leaves the kernel with a functional system with some working
      power management capabilities.
      The hrtimer based clock event device is unconditionally registered, but
      has the lowest possible rating such that any broadcast-capable HW clock
      event device present will be chosen in preference as the tick broadcast
      Reviewed-by: default avatarPreeti U Murthy <preeti@linux.vnet.ibm.com>
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
      Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
  8. 29 May, 2014 5 commits
  9. 23 May, 2014 5 commits
  10. 16 May, 2014 4 commits
    • Arun KS's avatar
      arm64: Fix deadlock scenario with smp_send_stop() · b9acc49e
      Arun KS authored
      If one process calls sys_reboot and that process then stops other
      CPUs while those CPUs are within a spin_lock() region we can
      potentially encounter a deadlock scenario like below.
      CPU 0                   CPU 1
      -----                   -----
       <send IPI>             handle_IPI()
      spin_lock(my_lock) <--- Waits forever
      We shouldn't attempt to run any other tasks after we send a stop
      IPI to a CPU so disable preemption so that this task runs to
      completion. We use local_irq_disable() here for cross-arch
      consistency with x86.
      Based-on-work-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      Signed-off-by: default avatarArun KS <getarunks@gmail.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    • Arun KS's avatar
      arm64: Fix machine_shutdown() definition · 90f51a09
      Arun KS authored
      This patch ports most of commit 19ab428f "ARM: 7759/1: decouple CPU
      offlining from reboot/shutdown" by Stephen Warren from arch/arm to
      machine_shutdown() is a hook for kexec. Add a comment saying so, since
      it isn't obvious from the function name.
      Halt, power-off, and restart have different requirements re: stopping
      secondary CPUs than kexec has. The former simply require the secondary
      CPUs to be quiesced somehow, whereas kexec requires them to be
      completely non-operational, so that no matter where the kexec target
      images are written in RAM, they won't influence operation of the
      secondary CPUS,which could happen if the CPUs were still executing some
      kind of pin loop. To this end, modify machine_halt, power_off, and
      restart to call smp_send_stop() directly, rather than calling
      In machine_shutdown(), replace the call to smp_send_stop() with a call
      to disable_nonboot_cpus(). This completely disables all but one CPU,
      thus satisfying the kexec requirements a couple paragraphs above.
      Signed-off-by: default avatarArun KS <getarunks@gmail.com>
      Acked-by: default avatarStephen Warren <swarren@nvidia.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    • Larry Bassel's avatar
      arm64: Support arch_irq_work_raise() via self IPIs · eb631bb5
      Larry Bassel authored
      Support for arch_irq_work_raise() was missing from
      arm64 (a prerequisite for FULL_NOHZ).
      This patch is based on the arm32 patch ARM 7872/1.
      commit bf18525f
      Author: Stephen Boyd <sboyd@codeaurora.org>
      Date:   Tue Oct 29 20:32:56 2013 +0100
          ARM: 7872/1: Support arch_irq_work_raise() via self IPIs
          By default, IRQ work is run from the tick interrupt (see
          irq_work_run() in update_process_times()). When we're in full
          NOHZ mode, restarting the tick requires the use of IRQ work and
          if the only place we run IRQ work is in the tick interrupt we
          have an unbreakable cycle. Implement arch_irq_work_raise() via
          self IPIs to break this cycle and get the tick started again.
          Note that we implement this via IPIs which are only available on
          SMP builds. This shouldn't be a problem because full NOHZ is only
          supported on SMP builds anyway.
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      Reviewed-by: default avatarKevin Hilman <khilman@linaro.org>
          Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: default avatarLarry Bassel <larry.bassel@linaro.org>
      Reviewed-by: default avatarKevin Hilman <khilman@linaro.org>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    • Mark Brown's avatar
      arm64: topology: Add support for topology DT bindings · ebdc9447
      Mark Brown authored
      Add support for parsing the explicit topology bindings to discover the
      topology of the system.
      Since it is not currently clear how to map multi-level clusters for the
      scheduler all leaf clusters are presented to the scheduler at the same
      level. This should be enough to provide good support for current systems.
      Signed-off-by: default avatarMark Brown <broonie@linaro.org>
      Reviewed-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>