- 23 Mar, 2006 5 commits
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Jesper Juhl authored
arch/i386/kernel/cpu/centaur.c: In function `centaur_mcr_insert': arch/i386/kernel/cpu/centaur.c:33: warning: implicit declaration of function `mtrr_centaur_report_mcr' Signed-off-by:
Jesper Juhl <jesper.juhl@gmail.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Chuck Ebbert authored
When vendor-specific i386 initialization code is unavailable the kernel falls back to a default CPU model name. Make that model name reflect the CPU family instead of an internal vendor index. Tested on Pentium II (family 6 model 5). /proc/cpuinfo before: model name : ff/05 after: model name : 06/05 Signed-off-by:
Chuck Ebbert <76306.1226@compuserve.com> Acked-by:
"Seth, Rohit" <rohit.seth@intel.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Chuck Ebbert authored
Allow the x86 "sep" feature to be disabled at bootup. This forces use of the int80 vsyscall. Mainly for testing or benchmarking the int80 vsyscall code. Signed-off-by:
Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Chuck Ebbert authored
Several places in arch/i386/kernel/cpu and kernel/cpu were using __devinit when they should have been __cpuinit. Fixing that saves ~4K when CONFIG_HOTPLUG && !CONFIG_HOTPLUG_CPU. Noticed by Andrew Morton. Signed-off-by:
Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Gerd Hoffmann authored
Implement SMP alternatives, i.e. switching at runtime between different code versions for UP and SMP. The code can patch both SMP->UP and UP->SMP. The UP->SMP case is useful for CPU hotplug. With CONFIG_CPU_HOTPLUG enabled the code switches to UP at boot time and when the number of CPUs goes down to 1, and switches to SMP when the number of CPUs goes up to 2. Without CONFIG_CPU_HOTPLUG or on non-SMP-capable systems the code is patched once at boot time (if needed) and the tables are released afterwards. The changes in detail: * The current alternatives bits are moved to a separate file, the SMP alternatives code is added there. * The patch adds some new elf sections to the kernel: .smp_altinstructions like .altinstructions, also contains a list of alt_instr structs. .smp_altinstr_replacement like .altinstr_replacement, but also has some space to save original instruction before replaving it. .smp_locks list of pointers to lock prefixes which can be nop'ed out on UP. The first two are used to replace more complex instruction sequences such as spinlocks and semaphores. It would be possible to deal with the lock prefixes with that as well, but by handling them as special case the table sizes become much smaller. * The sections are page-aligned and padded up to page size, so they can be free if they are not needed. * Splitted the code to release init pages to a separate function and use it to release the elf sections if they are unused. Signed-off-by:
Gerd Hoffmann <kraxel@suse.de> Signed-off-by:
Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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- 08 Mar, 2006 1 commit
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Shaohua Li authored
The x86_model calculation also applies for family 6. early_cpu_detect does the right thing, but generic_identify misses. Signed-off-by: Shaohua Li<shaohua.li@intel.com> Cc: Dave Jones <davej@codemonkey.org.uk> Cc: "Seth, Rohit" <rohit.seth@intel.com> Acked-by:
Andi Kleen <ak@muc.de> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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- 24 Feb, 2006 1 commit
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James Bottomley authored
Recent GDT changes broke the SMP boot sequence if the booting CPU is numbered anything other than zero. There's also a subtle source of error in that the boot time CPU now uses cpu_gdt_table (which is actually the GDT for booting CPUs in head.S). This patch fixes both problems by making GDT descriptors themselves allocated from a per_cpu area and switching to them in cpu_init(), which now means that cpu_gdt_table is exclusively used for booting CPUs again. Signed-off-by:
James Bottomley <James.Bottomley@SteelEye.com> Cc: Zachary Amsden <zach@vmware.com> Cc: Matt Tolentino <metolent@snoqualmie.dp.intel.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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- 17 Feb, 2006 1 commit
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Andi Kleen authored
AMD SimNow!'s JIT doesn't like them at all in the guest. For distribution installation it's easiest if it's a boot time option. Also I moved the variable to a more appropiate place and make it independent from sysctl And marked __read_mostly which it is. Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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- 05 Feb, 2006 1 commit
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Chuck Ebbert authored
i386 CPU init code accesses freed init memory when booting a newly-started processor after CPU hotplug. The cpu_devs array is searched to find the vendor and it contains pointers to freed data. Fix that by: 1. Zeroing entries for freed vendor data after bootup. 2. Changing Transmeta, NSC and UMC to all __init[data]. 3. Printing a warning (once only) and setting this_cpu to a safe default when the vendor is not found. This does not change behavior for AMD systems. They were broken already but no error was reported. Signed-off-by:
Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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- 26 Jan, 2006 2 commits
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Dave Jones authored
From http://www.intel.com/design/xeon/applnots/24161830.pdf 16MB of 16-way assoc 64 byte per cacheline L3 cache anyone? Yum. Signed-off-by:
Dave Jones <davej@redhat.com>
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Ben Collins authored
Ignore clock frequencies below 2Ghz for CPU's detected with N60 errata bug. Signed-off-by:
Ben Collins <bcollins@ubuntu.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Dave Jones <davej@redhat.com>
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- 19 Jan, 2006 1 commit
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Adrian Bunk authored
This patch fixes the following compile error: ... CC arch/i386/kernel/cpu/cpufreq/gx-suspmod.o arch/i386/kernel/cpu/cpufreq/gx-suspmod.c: In function 'gx_detect_chipset': arch/i386/kernel/cpu/cpufreq/gx-suspmod.c:193: error: implicit declaration of function 'pci_match_id' arch/i386/kernel/cpu/cpufreq/gx-suspmod.c:193: warning: comparison between pointer and integer make[3]: *** [arch/i386/kernel/cpu/cpufreq/gx-suspmod.o] Error 1 <-- snip --> Signed-off-by:
Adrian Bunk <bunk@stusta.de> Signed-off-by:
Dave Jones <davej@redhat.com>
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- 16 Jan, 2006 1 commit
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Andi Kleen authored
cpufreq init can be called when a CPU is set online. Need to make powernow-k8's initialisation functions __cpuinit to prevents oopses when a CPU is off/onlined on a AMD system Cc: trenn@suse.de Cc: mark.langsdorf@amd.com Cc: davej@redhat.com Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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- 11 Jan, 2006 5 commits
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Andi Kleen authored
early_cpu_detect only runs on the BP, but this code needs to run on all CPUs. Looks like a mismerge somewhere. Also add a warning comment. Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Andi Kleen authored
Print bits for RDTSCP, SVM, CR8-LEGACY. Also now print power flags on i386 like x86-64 always did. This will add a new line in the 386 cpuinfo, but that shouldn't be an issue - did that in the past too and I haven't heard of any breakage. I shrunk some of the fields in the i386 cpuinfo_x86 to chars to make up for the new int "x86_power" field. Overall it's smaller than before. Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Andi Kleen authored
They previously tried to figure this out on their own. Suggested by Venkatesh. Cc: venkatesh.pallipadi@intel.com Cc: davej@redhat.com Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Andi Kleen authored
Define it for i386 too. This is a synthetic flag that signifies that the CPU's TSC runs at a constant P state invariant frequency. Fix up the logic on x86-64/i386 to set it on all known CPUs. Use the AMD defined bit to set it on future AMD CPUs. Cc: venkatesh.pallipadi@intel.com Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Randy Dunlap authored
arch: Use <linux/capability.h> where capable() is used. Signed-off-by:
Randy Dunlap <rdunlap@xenotime.net> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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- 09 Jan, 2006 1 commit
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Adrian Bunk authored
This patch removes two outdated changelog files. Signed-off-by:
Adrian Bunk <bunk@stusta.de> Signed-off-by:
Dave Jones <davej@redhat.com>
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- 08 Jan, 2006 1 commit
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Matt Mackall authored
This adds configurable support for doublefault reporting on x86 add/remove: 0/3 grow/shrink: 0/1 up/down: 0/-13048 (-13048) function old new delta cpu_init 846 786 -60 doublefault_fn 188 - -188 doublefault_stack 4096 - -4096 doublefault_tss 8704 - -8704 Signed-off-by:
Matt Mackall <mpm@selenic.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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- 07 Jan, 2006 1 commit
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Benoit Boissinot authored
Signed-off-by:
Benoit Boissinot <benoit.boissinot@ens-lyon.org> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Len Brown <len.brown@intel.com>
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- 06 Jan, 2006 3 commits
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Jordan Crouse authored
Provide basic support for the AMD Geode GX and LX processors. Signed-off-by:
Jordan Crouse <jordan.crouse@amd.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Zachary Amsden authored
Stop deleting NT bit from EFLAGS. See arch/i386/kernel/head.S line 223, which does something even better. Signed-off-by:
Zachary Amsden <zach@vmware.com> Cc: "Seth, Rohit" <rohit.seth@intel.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Zachary Amsden authored
Make GDT page aligned and page padded to support running inside of a hypervisor. This prevents false sharing of the GDT page with other hot data, which is not allowed in Xen, and causes performance problems in VMware. Rather than go back to the old method of statically allocating the GDT (which wastes unneded space for non-present CPUs), the GDT for APs is allocated dynamically. Signed-off-by:
Zachary Amsden <zach@vmware.com> Cc: "Seth, Rohit" <rohit.seth@intel.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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- 05 Jan, 2006 1 commit
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Dave Jones authored
It's not like this has changed significantly, and probably never will. Reduce some bootup dmesg noise. Signed-off-by:
Dave Jones <davej@redhat.com>
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- 20 Dec, 2005 2 commits
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Dave Jones authored
I spotted 'main_lock' whilst grovelling through a vmlinux with objdump. Even if it is static, it's a horrible name. Signed-off-by:
Dave Jones <davej@redhat.com>
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Dave Jones authored
This CPU never made it into production. It went on to become the basis for the VIA Samuel. Signed-off-by:
Dave Jones <davej@redhat.com>
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- 06 Dec, 2005 4 commits
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Venkatesh Pallipadi authored
What is the value shown in "cpu MHz" of /proc/cpuinfo when CPUs are capable of changing frequency? Today the answer is: It depends. On i386: SMP kernel - It is always the boot frequency UP kernel - Scales with the frequency change and shows that was last set. On x86_64: There is one single variable cpu_khz that gets written by all the CPUs. So, the frequency set by last CPU will be seen on /proc/cpuinfo of all the CPUs in the system. What you see also depends on whether you have constant_tsc capable CPU or not. On ia64: It is always boot time frequency of a particular CPU that gets displayed. The patch below changes this to: Show the last known frequency of the particular CPU, when cpufreq is present. If cpu doesnot support changing of frequency through cpufreq, then boot frequency will be shown. The patch affects i386, x86_64 and ia64 architectures. Signed-off-by: Venkatesh Pallipadi<venkatesh.pallipadi@intel.com> Signed-off-by:
Dave Jones <davej@redhat.com>
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Mattia Dongili authored
This patch moves away PMBASE reading and only performs it at cpufreq_register_driver time by exiting with -ENODEV if unable to read the value. Signed-off-by:
Mattia Dongili <malattia@linux.it> Acked-by:
Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by:
Dave Jones <davej@redhat.com>
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Mattia Dongili authored
The attached patch introduces runtime latency measurement for ICH[234] based chipsets instead of using CPUFREQ_ETERNAL. It includes some sanity checks in case the measured value is out of range and assigns a safe value of 500uSec that should still be enough on problematics chipsets (current testing report values ~200uSec). The measurement is currently done in speedstep_get_freqs in order to avoid further unnecessary transitions and in the hope it'll come handy for SMI also. Signed-off-by:
Mattia Dongili <malattia@linux.it> Acked-by:
Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by:
Dave Jones <davej@redhat.com> speedstep-ich.c | 4 ++-- speedstep-lib.c | 32 +++++++++++++++++++++++++++++++- speedstep-lib.h | 1 + speedstep-smi.c | 1 + 4 files changed, 35 insertions(+), 3 deletions(-)
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Dave Jones authored
If a user has booted with 'quiet', some important messages don't get displayed which really should. We've seen at least one case where powernow-k8 stopped working, and the user needed a BIOS update that they didn't know about. Signed-off-by:
Dave Jones <davej@redhat.com>
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- 01 Dec, 2005 1 commit
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Gabriel A. Devenyi authored
Thanks to LinuxICC (http://linuxicc.sf.net ), a comparison of a u32 less than 0 was found, this patch changes the variable to a signed int so that comparison is meaningful. Signed-off-by:
Gabriel A. Devenyi <ace@staticwave.ca> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Dave Jones <davej@redhat.com>
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- 30 Nov, 2005 2 commits
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Venkatesh Pallipadi authored
Linux invokes the AML _PDC method (Processor Driver Capabilities) to tell the BIOS what features it can handle. While the ACPI spec says nothing about the OS invoking _PDC multiple times, doing so with changing bits seems to hopelessly confuse the BIOS on multiple platforms up to and including crashing the system. Factor out the _PDC invocation so Linux invokes it only once. http://bugzilla.kernel.org/show_bug.cgi?id=5483 Signed-off-by:
Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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Dave Jones authored
Signed-off-by:
Dave Jones <davej@redhat.com>
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- 29 Nov, 2005 1 commit
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Langsdorf, Mark authored
Future versions of the Opteron processor may support frequency transitions of 100 MHz, instead of the=20 current 200 MHz. This patch enables the powernow-k8 driver to transition to an odd FID code, indicating a multiple of 100 MHz frequency. Signed-off-by:
Jacob Shin <jacob.shin@amd.com> Signed-off-by:
Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by:
Dave Jones <davej@redhat.com>
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- 21 Nov, 2005 1 commit
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Jacob Shin authored
This patch cleans up some error messages in the powernow-k8 driver and makes them more understandable. Signed-off-by:
Jacob Shin <jacob.shin@amd.com> Signed-off-by:
Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by:
Dave Jones <davej@redhat.com>
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- 14 Nov, 2005 4 commits
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Siddha, Suresh B authored
Fix the Intel cache detection code assumption that number of threads sharing the cache will either be equal to number of HT or core siblings. This also cleans up the code in general a bit. Signed-off-by:
Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Siddha, Suresh B authored
Fields obtained through cpuid vector 0x1(ebx[16:23]) and vector 0x4(eax[14:25], eax[26:31]) indicate the maximum values and might not always be the same as what is available and what OS sees. So make sure "siblings" and "cpu cores" values in /proc/cpuinfo reflect the values as seen by OS instead of what cpuid instruction says. This will also fix the buggy BIOS cases (for example where cpuid on a single core cpu says there are "2" siblings, even when HT is disabled in the BIOS. http://bugzilla.kernel.org/show_bug.cgi?id=4359 ) Signed-off-by:
Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Shaohua Li authored
They report 40bit, but only have 36bits of physical address space. This caused problems with setting up the correct masks for MTRR. CPUID workaround for steppings 0F33h(supporting x86) and 0F34h(supporting x86 and EM64T). Detail info can be found at: http://download.intel.com/design/Xeon/specupdt/30240216.pdf http://download.intel.com/design/Pentium4/specupdt/30235221.pdf Signed-off-by: Shaohua Li<shaohua.li@intel.com> Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Suresh Siddha authored
According to cpuid instruction in IA32 SDM-Vol2, when computing cpu model, we need to consider extended model ID for family 0x6 also. AK: Also added fixes/simplifcation from Petr Vandrovec Signed-off-by:
Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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