1. 23 Jul, 2014 3 commits
  2. 07 Apr, 2014 1 commit
  3. 26 Feb, 2014 1 commit
  4. 05 Nov, 2013 1 commit
  5. 24 Oct, 2013 1 commit
  6. 12 Jun, 2013 1 commit
  7. 22 Jan, 2013 1 commit
    • Catalin Marinas's avatar
      arm64: Add simple earlyprintk support · 2475ff9d
      Catalin Marinas authored
      This patch adds support for "earlyprintk=" parameter on the kernel
      command line. The format is:
      where <name> is the name of the (UART) device, e.g. "pl011", <addr> is
      the I/O address. The <options> aren't currently used.
      The mapping of the earlyprintk device is done very early during kernel
      boot and there are restrictions on which functions it can call. A
      special early_io_map() function is added which creates the mapping from
      the pre-defined EARLY_IOBASE to the device I/O address passed via the
      kernel parameter. The pgd entry corresponding to EARLY_IOBASE is
      pre-populated in head.S during kernel boot.
      Only PL011 is currently supported and it is assumed that the interface
      is already initialised by the boot loader before the kernel is started.
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
  8. 29 Nov, 2012 1 commit
  9. 23 Oct, 2012 1 commit
  10. 17 Sep, 2012 1 commit
    • Catalin Marinas's avatar
      arm64: MMU definitions · 4f04d8f0
      Catalin Marinas authored
      The virtual memory layout is described in
      Documentation/arm64/memory.txt. This patch adds the MMU definitions for
      the 4KB and 64KB translation table configurations. The SECTION_SIZE is
      2MB with 4KB page and 512MB with 64KB page configuration.
      PHYS_OFFSET is calculated at run-time and stored in a variable (no
      run-time code patching at this stage).
      On the current implementation, both user and kernel address spaces are
      512G (39-bit) each with a maximum of 256G for the RAM linear mapping.
      Linux uses 3 levels of translation tables with the 4K page configuration
      and 2 levels with the 64K configuration. Extending the memory space
      beyond 39-bit with the 4K pages or 42-bit with 64K pages requires an
      additional level of translation tables.
      The SPARSEMEM configuration is global to all AArch64 platforms and
      allows for 1GB sections with SPARSEMEM_VMEMMAP enabled by default.
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Acked-by: default avatarTony Lindgren <tony@atomide.com>
      Acked-by: default avatarNicolas Pitre <nico@linaro.org>
      Acked-by: default avatarOlof Johansson <olof@lixom.net>
      Acked-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
      Acked-by: default avatarArnd Bergmann <arnd@arndb.de>