1. 17 Jun, 2006 1 commit
  2. 09 Jun, 2006 1 commit
    • David S. Miller's avatar
      [TG3]: Handle Sun onboard tg3 chips more correctly. · f49639e6
      David S. Miller authored
      
      
      Get rid of all the SUN_570X logic and instead:
      
      1) Make sure MEMARB_ENABLE is set when we probe the SRAM
         for config information.  If that is off we will get
         timeouts.
      
      2) Always try to sync with the firmware, if there is no
         firmware running do not treat it as an error and instead
         just report it the first time we notice this condition.
      
      3) If there is no valid SRAM signature, assume the device
         is onboard by setting TG3_FLAG_EEPROM_WRITE_PROT.
      
      Update driver version and release date.
      
      With help from Michael Chan and Fabio Massimo Di Nitto.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f49639e6
  3. 22 May, 2006 1 commit
  4. 12 May, 2006 1 commit
  5. 10 May, 2006 1 commit
  6. 29 Apr, 2006 6 commits
  7. 09 Apr, 2006 3 commits
    • Michael Chan's avatar
      [TG3]: Speed up SRAM access (2nd version) · bbadf503
      Michael Chan authored
      
      
      Speed up SRAM read and write functions if possible by using MMIO
      instead of config. cycles. With this change, the post reset signature
      done at the end of D3 power change must now be moved before the D3
      power change.
      
      IBM reported a problem on powerpc blades during ethtool self test that
      was caused by the memory test taking excessively long. Config.  cycles
      are very slow on powerpc and the memory test can take more than 10
      seconds to complete using config. cycles.
      
      David Miller informed me that an earlier version of the patch caused
      problems on sparc64 systems with built-in tg3 chips. This version
      fixes the problem by excluding all SUN built-in tg3 chips from doing
      MMIO SRAM access.
      
      TG3_FLAG_EEPROM_WRITE_PROT is also set unconditionally when
      TG3_FLG2_SUN_570X is set. This should be sane as all SUN chips are
      built-in and do not require Vaux switching.
      Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      bbadf503
    • Michael Chan's avatar
      [TG3]: Kill some less useful flags · d2d746f8
      Michael Chan authored
      
      
      Kill the TG3_FLAG_NO_{TX|RX}_PSEUDO_CSUM flags because they are not
      very useful. This will free up some bits for new flags.
      Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d2d746f8
    • Adrian Bunk's avatar
      [TG3]: Fix a memory leak. · ad96b485
      Adrian Bunk authored
      
      
      This patch fixes a memory leak (buf wasn't freed) spotted by the
      Coverity checker.
      Signed-off-by: default avatarAdrian Bunk <bunk@stusta.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ad96b485
  8. 02 Apr, 2006 1 commit
  9. 01 Apr, 2006 2 commits
  10. 28 Mar, 2006 6 commits
  11. 23 Mar, 2006 3 commits
  12. 22 Mar, 2006 3 commits
  13. 21 Mar, 2006 2 commits
  14. 20 Mar, 2006 9 commits