1. 07 Apr, 2009 10 commits
  2. 06 Apr, 2009 18 commits
  3. 04 Apr, 2009 7 commits
    • Philipp Zabel's avatar
      mfd: remove DS1WM clock handling · 7d33ccbe
      Philipp Zabel authored
      This driver requests a clock that usually is supplied by the MFD in which
      the DS1WM is contained. Currently, it is impossible for a MFD to register
      their clocks with the generic clock API due to different implementations
      across architectures.
      For now, this patch removes the clock handling from DS1WM altogether,
      trusting that the MFD enable/disable functions will switch the clock if
      needed. The clock rate is obtained from a new parameter in driver_data.
      Signed-off-by: default avatarPhilipp Zabel <philipp.zabel@gmail.com>
      Signed-off-by: default avatarSamuel Ortiz <sameo@openedhand.com>
      7d33ccbe
    • Philipp Zabel's avatar
      mfd: remove unused PASIC3 bus_shift field · b72019db
      Philipp Zabel authored
      Removes the now-unused bus_shift field from pasic3_platform_data.
      Signed-off-by: default avatarPhilipp Zabel <philipp.zabel@gmail.com>
      Signed-off-by: default avatarSamuel Ortiz <sameo@openedhand.com>
      b72019db
    • Philipp Zabel's avatar
      mfd: convert DS1WM to use MFD core · a23a1757
      Philipp Zabel authored
      This patch converts the DS1WM driver into an MFD cell. It also
      calculates the bus_shift parameter from the memory resource size.
      Signed-off-by: default avatarPhilipp Zabel <philipp.zabel@gmail.com>
      Signed-off-by: default avatarSamuel Ortiz <sameo@openedhand.com>
      a23a1757
    • Mark Brown's avatar
      32064503
    • Linus Torvalds's avatar
      Make non-compat preadv/pwritev use native register size · 601cc11d
      Linus Torvalds authored
      Instead of always splitting the file offset into 32-bit 'high' and 'low'
      parts, just split them into the largest natural word-size - which in C
      terms is 'unsigned long'.
      
      This allows 64-bit architectures to avoid the unnecessary 32-bit
      shifting and masking for native format (while the compat interfaces will
      obviously always have to do it).
      
      This also changes the order of 'high' and 'low' to be "low first".  Why?
      Because when we have it like this, the 64-bit system calls now don't use
      the "pos_high" argument at all, and it makes more sense for the native
      system call to simply match the user-mode prototype.
      
      This results in a much more natural calling convention, and allows the
      compiler to generate much more straightforward code.  On x86-64, we now
      generate
      
              testq   %rcx, %rcx      # pos_l
              js      .L122   #,
              movq    %rcx, -48(%rbp) # pos_l, pos
      
      from the C source
      
              loff_t pos = pos_from_hilo(pos_h, pos_l);
      	...
              if (pos < 0)
                      return -EINVAL;
      
      and the 'pos_h' register isn't even touched.  It used to generate code
      like
      
              mov     %r8d, %r8d      # pos_low, pos_low
              salq    $32, %rcx       #, tmp71
              movq    %r8, %rax       # pos_low, pos.386
              orq     %rcx, %rax      # tmp71, pos.386
              js      .L122   #,
              movq    %rax, -48(%rbp) # pos.386, pos
      
      which isn't _that_ horrible, but it does show how the natural word size
      is just a more sensible interface (same arguments will hold in the user
      level glibc wrapper function, of course, so the kernel side is just half
      of the equation!)
      
      Note: in all cases the user code wrapper can again be the same. You can
      just do
      
      	#define HALF_BITS (sizeof(unsigned long)*4)
      	__syscall(PWRITEV, fd, iov, count, offset, (offset >> HALF_BITS) >> HALF_BITS);
      
      or something like that.  That way the user mode wrapper will also be
      nicely passing in a zero (it won't actually have to do the shifts, the
      compiler will understand what is going on) for the last argument.
      
      And that is a good idea, even if nobody will necessarily ever care: if
      we ever do move to a 128-bit lloff_t, this particular system call might
      be left alone.  Of course, that will be the least of our worries if we
      really ever need to care, so this may not be worth really caring about.
      
      [ Fixed for lost 'loff_t' cast noticed by Andrew Morton ]
      Acked-by: default avatarGerd Hoffmann <kraxel@redhat.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: linux-api@vger.kernel.org
      Cc: linux-arch@vger.kernel.org
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Ralf Baechle <ralf@linux-mips.org>>
      Cc: Al Viro <viro@zeniv.linux.org.uk>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      601cc11d
    • David Brownell's avatar
      [MTD] driver model updates · 1f24b5a8
      David Brownell authored
      Update driver model support in the MTD framework, so it fits
      better into the current udev-based hotplug framework:
      
       - Each mtd_info now has a device node.  MTD drivers should set
         the dev.parent field to point to the physical device, before
         setting up partitions or otherwise declaring MTDs.
      
       - Those device nodes always map to /sys/class/mtdX device nodes,
         which no longer depend on MTD_CHARDEV.
      
       - Those mtdX sysfs nodes have a "starter set" of attributes;
         it's not yet sufficient to replace /proc/mtd.
      
       - Enabling MTD_CHARDEV provides /sys/class/mtdXro/ nodes and the
         /sys/class/mtd*/dev attributes (for udev, mdev, etc).
      
       - Include a MODULE_ALIAS_CHARDEV_MAJOR macro.  It'll work with
         udev creating the /dev/mtd* nodes, not just a static rootfs.
      
      So the sysfs structure is pretty much what you'd expect, except
      that readonly chardev nodes are a bit quirky.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
      1f24b5a8
    • David Woodhouse's avatar
      intel-iommu: Handle PCI domains appropriately. · 276dbf99
      David Woodhouse authored
      We were comparing {bus,devfn} and assuming that a match meant it was the
      same device. It doesn't -- the same {bus,devfn} can exist in
      multiple PCI domains. Include domain number in device identification
      (and call it 'segment' in most places, because there's already a lot of
      references to 'domain' which means something else, and this code is
      infected with ACPI thinking already).
      Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
      276dbf99
  4. 03 Apr, 2009 5 commits