1. 20 Feb, 2015 1 commit
  2. 28 Jul, 2014 1 commit
  3. 13 Aug, 2013 1 commit
  4. 10 Jul, 2012 1 commit
  5. 29 Apr, 2012 1 commit
  6. 22 Jun, 2010 1 commit
    • Paul Mackerras's avatar
      powerpc: Emulate most Book I instructions in emulate_step() · 0016a4cf
      Paul Mackerras authored
      This extends the emulate_step() function to handle a large proportion
      of the Book I instructions implemented on current 64-bit server
      processors.  The aim is to handle all the load and store instructions
      used in the kernel, plus all of the instructions that appear between
      l[wd]arx and st[wd]cx., so this handles the Altivec/VMX lvx and stvx
      and the VSX lxv2dx and stxv2dx instructions (implemented in POWER7).
      The new code can emulate user mode instructions, and checks the
      effective address for a load or store if the saved state is for
      user mode.  It doesn't handle little-endian mode at present.
      For floating-point, Altivec/VMX and VSX instructions, it checks
      that the saved MSR has the enable bit for the relevant facility
      set, and if so, assumes that the FP/VMX/VSX registers contain
      valid state, and does loads or stores directly to/from the
      FP/VMX/VSX registers, using assembly helpers in ldstfp.S.
      Instructions supported now include:
      * Loads and stores, including some but not all VMX and VSX instructions,
        and lmw/stmw
      * Atomic loads and stores (l[dw]arx, st[dw]cx.)
      * Arithmetic instructions (add, subtract, multiply, divide, etc.)
      * Compare instructions
      * Rotate and mask instructions
      * Shift instructions
      * Logical instructions (and, or, xor, etc.)
      * Condition register logical instructions
      * mtcrf, cntlz[wd], exts[bhw]
      * isync, sync, lwsync, ptesync, eieio
      * Cache operations (dcbf, dcbst, dcbt, dcbtst)
      The overflow-checking arithmetic instructions are not included, but
      they appear not to be ever used in C code.
      This uses decimal values for the minor opcodes in the switch statements
      because that is what appears in the Power ISA specification, thus it is
      easier to check that they are correct if they are in decimal.
      If this is used to single-step an instruction where a data breakpoint
      interrupt occurred, then there is the possibility that the instruction
      is a lwarx or ldarx.  In that case we have to be careful not to lose the
      reservation until we get to the matching st[wd]cx., or we'll never make
      forward progress.  One alternative is to try to arrange that we can
      return from interrupts and handle data breakpoint interrupts without
      losing the reservation, which means not using any spinlocks, mutexes,
      or atomic ops (including bitops).  That seems rather fragile.  The
      other alternative is to emulate the larx/stcx and all the instructions
      in between.  This is why this commit adds support for a wide range
      of integer instructions.
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
  7. 17 May, 2010 1 commit
  8. 17 Mar, 2010 1 commit
    • Paul Mackerras's avatar
      powerpc/perf_events: Fix call-graph recording, add perf_arch_fetch_caller_regs · 9eff26ea
      Paul Mackerras authored
      This implements a powerpc version of perf_arch_fetch_caller_regs
      to get correct call-graphs.
      It's implemented in assembly because that way we can be sure there isn't
      a stack frame for perf_arch_fetch_caller_regs.  If it was in C, gcc might
      or might not create a stack frame for it, which would affect the number
      of levels we have to skip.
      With this, we see results from perf record -e lock:lock_acquire like
       # Samples: 24878
       # Overhead         Command      Shared Object  Symbol
       # ........  ..............  .................  ......
          14.99%            perf  [kernel.kallsyms]  [k] ._raw_spin_lock
                            --- ._raw_spin_lock
                               |--25.00%-- .alloc_fd
                               |          (nil)
                               |          |
                               |          |--50.00%-- .anon_inode_getfd
                               |          |          .sys_perf_event_open
                               |          |          syscall_exit
                               |          |          syscall
                               |          |          create_counter
                               |          |          __cmd_record
                               |          |          run_builtin
                               |          |          main
                               |          |          0xfd2e704
                               |          |          0xfd2e8c0
                               |          |          (nil)
      ... etc.
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      Acked-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: anton@samba.org
      Cc: linuxppc-dev@ozlabs.org
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      LKML-Reference: <20100318050513.GA6575@drongo>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
  9. 16 Feb, 2010 1 commit
  10. 03 Aug, 2008 1 commit
  11. 21 Jul, 2008 1 commit
  12. 30 Jun, 2008 1 commit
  13. 12 Apr, 2007 1 commit
  14. 24 Oct, 2006 1 commit
    • Benjamin Herrenschmidt's avatar
      [POWERPC] Support feature fixups in vdso's · 0909c8c2
      Benjamin Herrenschmidt authored
      This patch reworks the feature fixup mecanism so vdso's can be fixed up.
      The main issue was that the construct:
              .long   label  (or .llong on 64 bits)
      will not work in the case of a shared library like the vdso. It will
      generate an empty placeholder in the fixup table along with a reloc,
      which is not something we can deal with in the vdso.
      The idea here (thanks Alan Modra !) is to instead use something like:
              .long   label - 1b
      That is, the feature fixup tables no longer contain addresses of bits of
      code to patch, but offsets of such code from the fixup table entry
      itself. That is properly resolved by ld when building the .so's. I've
      modified the fixup mecanism generically to use that method for the rest
      of the kernel as well.
      Another trick is that the 32 bits vDSO included in the 64 bits kernel
      need to have a table in the 64 bits format. However, gas does not
      support 32 bits code with a statement of the form:
              .llong  label - 1b  (Or even just .llong label)
      That is, it cannot emit the right fixup/relocation for the linker to use
      to assign a 32 bits address to an .llong field. Thus, in the specific
      case of the 32 bits vdso built as part of the 64 bits kernel, we are
      using a modified macro that generates:
              .long   0xffffffff
              .llong  label - 1b
      Note that is assumes that the value is negative which is enforced by
      the .lds (those offsets are always negative as the .text is always
      before the fixup table and gas doesn't support emiting the reloc the
      other way around).
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
  15. 08 Jan, 2006 1 commit
  16. 09 Nov, 2005 1 commit
    • David Gibson's avatar
      [PATCH] powerpc: Consolidate asm compatibility macros · 3ddfbcf1
      David Gibson authored
      This patch consolidates macros used to generate assembly for
      compatibility across different CPUs or configs.  A new header,
      asm-powerpc/asm-compat.h contains the main compatibility macros.  It
      uses some preprocessor magic to make the macros suitable both for use
      in .S files, and in inline asm in .c files.  Headers (bitops.h,
      uaccess.h, atomic.h, bug.h) which had their own such compatibility
      macros are changed to use asm-compat.h.
      ppc_asm.h is now for use in .S files *only*, and a #error enforces
      that.  As such, we're a lot more careless about namespace pollution
      here than in asm-compat.h.
      While we're at it, this patch adds a call to the PPC405_ERR77 macro in
      futex.h which should have had it already, but didn't.
      Built and booted on pSeries, Maple and iSeries (ARCH=powerpc).  Built
      for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
      Signed-off-by: default avatarDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>