1. 25 May, 2010 1 commit
  2. 18 May, 2010 1 commit
  3. 22 Apr, 2010 1 commit
    • Jerome Glisse's avatar
      agp: use scratch page on memory remove and at GATT creation V4 · 61cf0593
      Jerome Glisse authored
      
      
      Convert most AGP chipset to use scratch page as default entries.
      This help avoiding GPU querying 0 address and trigger computer
      fault. With KMS and memory manager we bind/unbind AGP memory
      constantly and it seems that some GPU are still doing AGP
      traffic even after GPU report being idle with the memory segment.
      
      Tested (radeon GPU KMS + Xorg + compiz + glxgears + quake3) on :
      - SIS 1039:0001 & 1039:0003
      - Intel 865 8086:2571
      
      Compile tested for other bridges
      
      V2 enable scratch page on uninorth
      V3 fix unbound check in uninorth insert memory (Michel Dänzer)
      V4 rebase on top of drm-next branch with the lastest intel AGP
         changeset (stable should use version V3 of the patch)
      Signed-off-by: default avatarJerome Glisse <jglisse@redhat.com>
      Signed-off-by: default avatarMichel Dänzer <michel@daenzer.net>
      Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
      61cf0593
  4. 03 Feb, 2010 1 commit
  5. 30 Jan, 2010 1 commit
  6. 13 Jan, 2010 1 commit
  7. 30 Dec, 2009 1 commit
  8. 03 Aug, 2009 2 commits
  9. 18 Jun, 2009 1 commit
  10. 10 Mar, 2009 1 commit
  11. 20 Oct, 2008 1 commit
  12. 21 Aug, 2008 1 commit
    • Rene Herman's avatar
      agp: enable optimized agp_alloc_pages methods · 5f310b63
      Rene Herman authored
      
      
      The pageattr-array patch that you currently have in tip/master only
      enables it for intel-agp, not the others. The attached enables it for
      all drivers currently directly using agp_generic_alloc_page() and
      agp_generic_destroy_page() (ocal driver is amd-k7-agp).
      
      The new agp_generic_alloc_pages() interface uses the also new
      pageattr array interface API. This makes all AGP drivers that
      up to now used generic_{alloc,destroy}_page() use it.
      Signed-off-by: default avatarRene Herman <rene.herman@gmail.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      5f310b63
  13. 11 Aug, 2008 2 commits
  14. 18 Jun, 2008 1 commit
  15. 22 May, 2008 1 commit
  16. 12 May, 2008 4 commits
  17. 29 Oct, 2007 1 commit
  18. 11 Jul, 2007 1 commit
    • Auke Kok's avatar
      PCI: Change all drivers to use pci_device->revision · 44c10138
      Auke Kok authored
      
      
      Instead of all drivers reading pci config space to get the revision
      ID, they can now use the pci_device->revision member.
      
      This exposes some issues where drivers where reading a word or a dword
      for the revision number, and adding useless error-handling around the
      read. Some drivers even just read it for no purpose of all.
      
      In devices where the revision ID is being copied over and used in what
      appears to be the equivalent of hotpath, I have left the copy code
      and the cached copy as not to influence the driver's performance.
      
      Compile tested with make all{yes,mod}config on x86_64 and i386.
      Signed-off-by: default avatarAuke Kok <auke-jan.h.kok@intel.com>
      Acked-by: default avatarDave Jones <davej@redhat.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
      44c10138
  19. 11 May, 2007 1 commit
  20. 02 May, 2007 1 commit
  21. 22 Feb, 2007 1 commit
  22. 03 Feb, 2007 1 commit
    • Thomas Hellstrom's avatar
      [AGPGART] Allow drm-populated agp memory types · a030ce44
      Thomas Hellstrom authored
      
      
      This patch allows drm to populate an agpgart structure with pages of its own.
      It's needed for the new drm memory manager which dynamically flips pages in and out of AGP.
      
      The patch modifies the generic functions as well as the intel agp driver. The intel drm driver is
      currently the only one supporting the new memory manager.
      
      Other agp drivers may need some minor fixing up once they have a corresponding memory manager enabled drm driver.
      
      AGP memory types >= AGP_USER_TYPES are not populated by the agpgart driver, but the drm is expected
      to do that, as well as taking care of cache- and tlb flushing when needed.
      
      It's not possible to request these types from user space using agpgart ioctls.
      
      The Intel driver also gets a new memory type for pages that can be bound cached to the intel GTT.
      Signed-off-by: default avatarThomas Hellstrom <thomas@tungstengraphics.com>
      Signed-off-by: default avatarDave Jones <davej@redhat.com>
      a030ce44
  23. 28 Jan, 2007 1 commit
  24. 18 Dec, 2006 1 commit
  25. 12 Dec, 2006 1 commit
  26. 07 Dec, 2006 1 commit
  27. 26 Sep, 2006 1 commit
  28. 30 Jun, 2006 1 commit
  29. 26 Jun, 2006 2 commits
    • Andi Kleen's avatar
      [PATCH] x86_64: Rename IOMMU option, fix help and mark option embedded. · a813ce43
      Andi Kleen authored
      
      
       - Rename the GART_IOMMU option to IOMMU to make clear it's not
         just for AMD
       - Rewrite the help text to better emphatise this fact
       - Make it an embedded option because too many people get it wrong.
      
      To my astonishment I discovered the aacraid driver tests this
      symbol directly. This looks quite broken to me - it's an internal
      implementation detail of the PCI DMA API. Can the maintainer
      please clarify what this test was intended to do?
      
      Cc: linux-scsi@vger.kernel.org
      Cc: alan@redhat.com
      Cc: markh@osdl.org
      Signed-off-by: default avatarAndi Kleen <ak@suse.de>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      a813ce43
    • Andi Kleen's avatar
      [PATCH] x86_64: Clean and enhance up K8 northbridge access code · a32073bf
      Andi Kleen authored
      
      
       - Factor out the duplicated access/cache code into a single file
         * Shared between i386/x86-64.
       - Share flush code between AGP and IOMMU
         * Fix a bug: AGP didn't wait for end of flush before
       - Drop 8 northbridges limit and allocate dynamically
       - Add lock to serialize AGP and IOMMU GART flushes
       - Add PCI ID for next AMD northbridge
       - Random related cleanups
      
      The old K8 NUMA discovery code is unchanged. New systems
      should all use SRAT for this.
      
      Cc: "Navin Boppuri" <navin.boppuri@newisys.com>
      Cc: Dave Jones <davej@redhat.com>
      Signed-off-by: default avatarAndi Kleen <ak@suse.de>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      a32073bf
  30. 21 Jun, 2006 1 commit
  31. 21 May, 2006 1 commit
  32. 25 Mar, 2006 1 commit
  33. 24 Mar, 2006 1 commit
  34. 27 Feb, 2006 1 commit