1. 31 May, 2014 1 commit
  2. 25 Feb, 2014 2 commits
  3. 10 Feb, 2014 1 commit
    • Santosh Shilimkar's avatar
      ARM: 7952/1: mm: Fix the memblock allocation for LPAE machines · ca474408
      Santosh Shilimkar authored
      Commit ad6492b8 added much needed memblock_virt_alloc_low() and further
      commit 07bacb38 {memblock, bootmem: restore goal for alloc_low} fixed
      the issue with low memory limit thanks to Yinghai. But even after all
      these fixes, there is still one case where the limit check done with
      ARCH_LOW_ADDRESS_LIMIT for low memory fails. Russell pointed out the
      issue with 32 bit LPAE machines in below thread.
      	https://lkml.org/lkml/2014/1/28/364
      
      
      
      Since on some LPAE machines where memory start address is beyond 4GB,
      the low memory marker in memblock will be set to default
      ARCH_LOW_ADDRESS_LIMIT which is wrong. We can fix this by letting
      architectures set the ARCH_LOW_ADDRESS_LIMIT using another export
      similar to memblock_set_current_limit() but am not sure whether
      its worth the trouble. Tell me if you think otherwise.
      
      Rather am just trying to fix that one broken case using
      memblock_virt_alloc() in setup code since the memblock.current_limit
      is updated appropriately makes it work on all ARM 32 bit machines.
      
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Strashko, Grygorii <grygorii.strashko@ti.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      ca474408
  4. 27 Jan, 2014 1 commit
  5. 21 Jan, 2014 2 commits
    • Santosh Shilimkar's avatar
      arch/arm/kernel/: use memblock apis for early memory allocations · 9233d2be
      Santosh Shilimkar authored
      
      
      Switch to memblock interfaces for early memory allocator instead of
      bootmem allocator.  No functional change in beahvior than what it is in
      current code from bootmem users points of view.
      
      Archs already converted to NO_BOOTMEM now directly use memblock
      interfaces instead of bootmem wrappers build on top of memblock.  And
      the archs which still uses bootmem, these new apis just fallback to
      exiting bootmem APIs.
      Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Christoph Lameter <cl@linux-foundation.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Grygorii Strashko <grygorii.strashko@ti.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Johannes Weiner <hannes@cmpxchg.org>
      Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Michal Hocko <mhocko@suse.cz>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Tejun Heo <tj@kernel.org>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      9233d2be
    • Russell King's avatar
      ARM: ignore memory below PHYS_OFFSET · 571b1437
      Russell King authored
      
      
      If the kernel is loaded higher in physical memory than normal, and we
      calculate PHYS_OFFSET higher than the start of RAM, this leads to
      boot problems as we attempt to map part of this RAM into userspace.
      Rather than struggle with this, just truncate the mapping.
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      571b1437
  6. 29 Dec, 2013 1 commit
  7. 09 Dec, 2013 1 commit
  8. 23 Nov, 2013 1 commit
    • Santosh Shilimkar's avatar
      ARM: mm: Remove bootmem code and switch to NO_BOOTMEM · 84f452b1
      Santosh Shilimkar authored
      
      
      Now with dma_mask series merged and max*pfn has consistent meaning on ARM
      as rest of the arch's thanks to RMK's mega series, lets switch ARM code
      to NO_BOOTMEM. With NO_BOOTMEM change, now we use memblock allocator to
      reserve space for crash kernel to have one less dependency with nobootmem
      allocator wrapper.
      
      Tested with both flat memory and sparse (faked) memory models with highmem
      enabled.
      
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
      Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
      84f452b1
  9. 29 Oct, 2013 3 commits
  10. 10 Oct, 2013 1 commit
  11. 26 Sep, 2013 1 commit
  12. 02 Sep, 2013 1 commit
  13. 26 Jul, 2013 2 commits
  14. 22 Jul, 2013 1 commit
  15. 09 Jul, 2013 1 commit
  16. 24 Jun, 2013 1 commit
  17. 20 Jun, 2013 1 commit
    • Lorenzo Pieralisi's avatar
      ARM: kernel: build MPIDR hash function data structure · 8cf72172
      Lorenzo Pieralisi authored
      
      
      On ARM SMP systems, cores are identified by their MPIDR register.
      The MPIDR guidelines in the ARM ARM do not provide strict enforcement of
      MPIDR layout, only recommendations that, if followed, split the MPIDR
      on ARM 32 bit platforms in three affinity levels. In multi-cluster
      systems like big.LITTLE, if the affinity guidelines are followed, the
      MPIDR can not be considered an index anymore. This means that the
      association between logical CPU in the kernel and the HW CPU identifier
      becomes somewhat more complicated requiring methods like hashing to
      associate a given MPIDR to a CPU logical index, in order for the look-up
      to be carried out in an efficient and scalable way.
      
      This patch provides a function in the kernel that starting from the
      cpu_logical_map, implement collision-free hashing of MPIDR values by checking
      all significative bits of MPIDR affinity level bitfields. The hashing
      can then be carried out through bits shifting and ORing; the resulting
      hash algorithm is a collision-free though not minimal hash that can be
      executed with few assembly instructions. The mpidr is filtered through a
      mpidr mask that is built by checking all bits that toggle in the set of
      MPIDRs corresponding to possible CPUs. Bits that do not toggle do not carry
      information so they do not contribute to the resulting hash.
      
      Pseudo code:
      
      /* check all bits that toggle, so they are required */
      for (i = 1, mpidr_mask = 0; i < num_possible_cpus(); i++)
      	mpidr_mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
      
      /*
       * Build shifts to be applied to aff0, aff1, aff2 values to hash the mpidr
       * fls() returns the last bit set in a word, 0 if none
       * ffs() returns the first bit set in a word, 0 if none
       */
      fs0 = mpidr_mask[7:0] ? ffs(mpidr_mask[7:0]) - 1 : 0;
      fs1 = mpidr_mask[15:8] ? ffs(mpidr_mask[15:8]) - 1 : 0;
      fs2 = mpidr_mask[23:16] ? ffs(mpidr_mask[23:16]) - 1 : 0;
      ls0 = fls(mpidr_mask[7:0]);
      ls1 = fls(mpidr_mask[15:8]);
      ls2 = fls(mpidr_mask[23:16]);
      bits0 = ls0 - fs0;
      bits1 = ls1 - fs1;
      bits2 = ls2 - fs2;
      aff0_shift = fs0;
      aff1_shift = 8 + fs1 - bits0;
      aff2_shift = 16 + fs2 - (bits0 + bits1);
      u32 hash(u32 mpidr) {
      	u32 l0, l1, l2;
      	u32 mpidr_masked = mpidr & mpidr_mask;
      	l0 = mpidr_masked & 0xff;
      	l1 = mpidr_masked & 0xff00;
      	l2 = mpidr_masked & 0xff0000;
      	return (l0 >> aff0_shift | l1 >> aff1_shift | l2 >> aff2_shift);
      }
      
      The hashing algorithm relies on the inherent properties set in the ARM ARM
      recommendations for the MPIDR. Exotic configurations, where for instance the
      MPIDR values at a given affinity level have large holes, can end up requiring
      big hash tables since the compression of values that can be achieved through
      shifting is somewhat crippled when holes are present. Kernel warns if
      the number of buckets of the resulting hash table exceeds the number of
      possible CPUs by a factor of 4, which is a symptom of a very sparse HW
      MPIDR configuration.
      
      The hash algorithm is quite simple and can easily be implemented in assembly
      code, to be used in code paths where the kernel virtual address space is
      not set-up (ie cpu_resume) and instruction and data fetches are strongly
      ordered so code must be compact and must carry out few data accesses.
      
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Colin Cross <ccross@android.com>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
      Cc: Amit Kucheria <amit.kucheria@linaro.org>
      Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Reviewed-by: default avatarDave Martin <Dave.Martin@arm.com>
      Reviewed-by: default avatarNicolas Pitre <nico@linaro.org>
      Tested-by: default avatarShawn Guo <shawn.guo@linaro.org>
      Tested-by: default avatarKevin Hilman <khilman@linaro.org>
      Tested-by: default avatarStephen Warren <swarren@wwwdotorg.org>
      8cf72172
  18. 30 May, 2013 1 commit
  19. 21 May, 2013 2 commits
  20. 15 May, 2013 1 commit
    • Ming Lei's avatar
      ARM: 7669/1: keep __my_cpu_offset consistent with generic one · 9394c1c6
      Ming Lei authored
      Commit 14318efb
      
      (ARM: 7587/1: implement optimized percpu variable access)
      introduces arm's __my_cpu_offset to optimize percpu vaiable access,
      which really works well on hackbench, but will cause __my_cpu_offset
      to return garbage value before it is initialized in cpu_init() called
      by setup_arch, so accessing percpu variable before setup_arch may cause
      kernel hang. But generic __my_cpu_offset always returns zero before
      percpu area is brought up, and won't hang kernel.
      
      So the patch tries to clear __my_cpu_offset on boot CPU early
      to avoid boot hang.
      
      At least now percpu variable is accessed by lockdep before
      setup_arch(), and enabling CONFIG_LOCK_STAT or CONFIG_DEBUG_LOCKDEP
      can trigger kernel hang.
      Signed-off-by: default avatarMing Lei <tom.leiming@gmail.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      9394c1c6
  21. 29 Apr, 2013 1 commit
    • Arnd Bergmann's avatar
      ARM: default machine descriptor for multiplatform · 883a106b
      Arnd Bergmann authored
      
      
      Since we now have default implementations for init_time and init_irq,
      the init_machine callback is the only one that is not yet optional,
      but since simple DT based platforms all have the same
      of_platform_populate function call in there, we can consolidate them
      as well, and then actually boot with a completely empty machine_desc.
      Unofortunately we cannot just default to an empty init_machine: We
      cannot call of_platform_populate before init_machine because that
      does not work in case of auxdata, and we cannot call it after
      init_machine either because the machine might need to run code
      after adding the devices.
      
      To take the final step, this adds support for booting without defining
      any machine_desc whatsoever.
      
      For the case that CONFIG_MULTIPLATFORM is enabled, it adds a
      global machine descriptor that never matches any machine but is
      used as a fallback if nothing else matches. We assume that without
      CONFIG_MULTIPLATFORM, we only want to boot on the systems that the kernel
      is built for, so we still retain the build-time warning for missing
      machine descriptors and the run-time warning when the platform does not
      match in that case.
      
      In the case that we run on a multiplatform kernel and the machine
      provides a fully populated device tree, we attempt to keep booting,
      hoping that no machine specific callbacks are necessary.
      
      Finally, this also removes the misguided "select ARCH_VEXPRESS" that
      was only added to avoid a build error for allnoconfig kernels.
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Acked-by: default avatarNicolas Pitre <nico@linaro.org>
      Acked-by: default avatarOlof Johansson <olof@lixom.net>
      Cc: "Russell King - ARM Linux" <linux@arm.linux.org.uk>
      Cc: Rob Herring <robherring2@gmail.com>
      883a106b
  22. 26 Apr, 2013 1 commit
  23. 17 Apr, 2013 2 commits
  24. 03 Apr, 2013 1 commit
    • Paul Bolle's avatar
      ARM: 7690/1: mm: fix CONFIG_LPAE typos · 4e1db26a
      Paul Bolle authored
      
      
      CONFIG_LPAE doesn't exist: the correct option is CONFIG_ARM_LPAE, so fix
      up the two typos under arch/arm/.
      
      The fix to head.S is slightly scary, but this is just for setting up
      an early io-mapping for the serial port when running on a big-endian,
      LPAE system. Since these systems don't exist in the wild (at least, I
      have no access to one outside of kvmtool, which doesn't provide a serial
      port suitable for earlyprintk), then we can revisit the code later if it
      causes any problems.
      Signed-off-by: default avatarPaul Bolle <pebolle@tiscali.nl>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      4e1db26a
  25. 22 Mar, 2013 2 commits
  26. 31 Jan, 2013 1 commit
  27. 16 Dec, 2012 1 commit
  28. 03 Dec, 2012 1 commit
    • Rob Herring's avatar
      ARM: 7587/1: implement optimized percpu variable access · 14318efb
      Rob Herring authored
      
      
      Use the previously unused TPIDRPRW register to store percpu offsets.
      TPIDRPRW is only accessible in PL1, so it can only be used in the kernel.
      
      This replaces 2 loads with a mrc instruction for each percpu variable
      access. With hackbench, the performance improvement is 1.4% on Cortex-A9
      (highbank). Taking an average of 30 runs of "hackbench -l 1000" yields:
      
      Before: 6.2191
      After: 6.1348
      
      Will Deacon reported similar delta on v6 with 11MPCore.
      
      The asm "memory clobber" are needed here to ensure the percpu offset
      gets reloaded. Testing by Will found that this would not happen in
      __schedule() which is a bit of a special case as preemption is disabled
      but the execution can move cores.
      Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Acked-by: default avatarNicolas Pitre <nico@linaro.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      14318efb
  29. 19 Nov, 2012 3 commits
    • Lorenzo Pieralisi's avatar
      ARM: kernel: add cpu logical map DT init in setup_arch · 5587164e
      Lorenzo Pieralisi authored
      
      
      As soon as the device tree is unflattened the cpu logical to physical
      mapping is carried out in setup_arch to build a proper array of MPIDR and
      corresponding logical indexes.
      
      The mapping could have been carried out using the flattened DT blob and
      related primitives, but since the mapping is not needed by early boot
      code it can safely be executed when the device tree has been uncompressed to
      its tree data structure.
      
      This patch adds the arm_dt_init_cpu maps() function call in setup_arch().
      
      If the kernel is not compiled with DT support the function is empty and
      no logical mapping takes place through it; the mapping carried out in
      smp_setup_processor_id() is left unchanged.
      If DT is supported the mapping created in smp_setup_processor_id() is overriden.
      The DT mapping also sets the possible cpus mask, hence platform
      code need not set it again in the respective smp_init_cpus() functions.
      Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Acked-by: default avatarNicolas Pitre <nico@linaro.org>
      5587164e
    • Lorenzo Pieralisi's avatar
      ARM: kernel: smp_setup_processor_id() updates · cb8cf4f8
      Lorenzo Pieralisi authored
      
      
      This patch applies some basic changes to the smp_setup_processor_id()
      ARM implementation to make the code that builds cpu_logical_map more
      uniform across the kernel.
      
      The function now prints the full extent of the boot CPU MPIDR[23:0] and
      initializes the cpu_logical_map for CPUs up to nr_cpu_ids.
      Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Acked-by: default avatarNicolas Pitre <nico@linaro.org>
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      cb8cf4f8
    • Lorenzo Pieralisi's avatar
      ARM: kernel: update cpuinfo to print all online CPUs features · b4b8f770
      Lorenzo Pieralisi authored
      
      
      Currently, reading /proc/cpuinfo provides userspace with CPU ID of
      the CPU carrying out the read from the file. This is fine as long as all
      CPUs in the system are the same. With the advent of big.LITTLE and
      heterogenous ARM systems this approach provides user space with incorrect
      bits of information since CPU ids in the system might differ from the one
      provided by the CPU reading the file.
      
      This patch updates the cpuinfo show function so that a read from
      /proc/cpuinfo prints HW information for all online CPUs at once, mirroring
       x86 behaviour.
      Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Acked-by: default avatarNicolas Pitre <nico@linaro.org>
      b4b8f770
  30. 19 Sep, 2012 1 commit