1. 29 Mar, 2012 3 commits
    • Len Brown's avatar
      tools turbostat: harden against cpu online/offline · 15aaa346
      Len Brown authored
      
      
      Sometimes users have turbostat running in interval mode
      when they take processors offline/online.
      
      Previously, turbostat would survive, but not gracefully.
      
      Tighten up the error checking so turbostat notices
      changesn sooner, and print just 1 line on change:
      
      turbostat: re-initialized with num_cpus %d
      Signed-off-by: default avatarLen Brown <len.brown@intel.com>
      15aaa346
    • Len Brown's avatar
      tools turbostat: reduce measurement overhead due to IPIs · 88c3281f
      Len Brown authored
      
      
      turbostat uses /dev/cpu/*/msr interface to read MSRs.
      For modern systems, it reads 10 MSR/CPU.  This can
      be observed as 10 "Function Call Interrupts"
      per CPU per sample added to /proc/interrupts.
      
      This overhead is measurable on large idle systems,
      and as Yoquan Song pointed out, it can even trick
      cpuidle into thinking the system is busy.
      
      Here turbostat re-schedules itself in-turn to each
      CPU so that its MSR reads will always be local.
      This replaces the 10 "Function Call Interrupts"
      with a single "Rescheduling interrupt" per sample
      per CPU.
      
      On an idle 32-CPU system, this shifts some residency from
      the shallow c1 state to the deeper c7 state:
      
       # ./turbostat.old -s
         %c0  GHz  TSC    %c1    %c3    %c6    %c7   %pc2   %pc3   %pc6   %pc7
        0.27 1.29 2.29   0.95   0.02   0.00  98.77  20.23   0.00  77.41   0.00
        0.25 1.24 2.29   0.98   0.02   0.00  98.75  20.34   0.03  77.74   0.00
        0.27 1.22 2.29   0.54   0.00   0.00  99.18  20.64   0.00  77.70   0.00
        0.26 1.22 2.29   1.22   0.00   0.00  98.52  20.22   0.00  77.74   0.00
        0.26 1.38 2.29   0.78   0.02   0.00  98.95  20.51   0.05  77.56   0.00
      ^C
       i# ./turbostat.new -s
         %c0  GHz  TSC    %c1    %c3    %c6    %c7   %pc2   %pc3   %pc6   %pc7
        0.27 1.20 2.29   0.24   0.01   0.00  99.49  20.58   0.00  78.20   0.00
        0.27 1.22 2.29   0.25   0.00   0.00  99.48  20.79   0.00  77.85   0.00
        0.27 1.20 2.29   0.25   0.02   0.00  99.46  20.71   0.03  77.89   0.00
        0.28 1.26 2.29   0.25   0.01   0.00  99.46  20.89   0.02  77.67   0.00
        0.27 1.20 2.29   0.24   0.01   0.00  99.48  20.65   0.00  78.04   0.00
      
      cc: Youquan Song <youquan.song@intel.com>
      Signed-off-by: default avatarLen Brown <len.brown@intel.com>
      88c3281f
    • Len Brown's avatar
      tools turbostat: add summary option · e23da037
      Len Brown authored
      
      
      turbostat -s
      cuts down on the amount of output, per user request.
      
      also treak some output whitespace and the man page.
      Signed-off-by: default avatarLen Brown <len.brown@intel.com>
      e23da037
  2. 15 Dec, 2011 1 commit
  3. 18 Nov, 2011 1 commit
  4. 19 Aug, 2011 3 commits
  5. 15 Aug, 2011 5 commits
  6. 02 Aug, 2011 1 commit
  7. 29 Jul, 2011 15 commits
  8. 15 Jul, 2011 1 commit
  9. 03 Jul, 2011 1 commit
  10. 10 Apr, 2011 1 commit
  11. 31 Mar, 2011 1 commit
  12. 10 Feb, 2011 2 commits
  13. 11 Jan, 2011 2 commits
    • Len Brown's avatar
      tools: create power/x86/x86_energy_perf_policy · d5532ee7
      Len Brown authored
      MSR_IA32_ENERGY_PERF_BIAS first became available on Westmere Xeon.
      It is implemented in all Sandy Bridge processors -- mobile, desktop and server.
      It is expected to become increasingly important in subsequent generations.
      
      x86_energy_perf_policy is a user-space utility to set the
      hardware energy vs performance policy hint in the processor.
      Most systems would benefit from "x86_energy_perf_policy normal"
      at system startup, as the hardware default is maximum performance
      at the expense of energy efficiency.
      
      See x86_energy_perf_policy.8 man page for more information.
      
      Background:
      
      Linux-2.6.36 added "epb" to /proc/cpuinfo to indicate
      if an x86 processor supports MSR_IA32_ENERGY_PERF_BIAS,
      without actually modifying the MSR.
      
      In March, 2010, Venkatesh Pallipadi proposed a small driver
      that programmed MSR_IA32_ENERGY_PERF_BIAS, based on
      the cpufreq governor in use.  It also offered
      a boot-time cmdline option to override.
      http://lkml.org/lkml/2010/3/4/457
      But hiding the hardware policy behind the
      governor choice was deemed "kinda icky".
      
      In June, 2010, I proposed a generic user/kernel API to
      generalize the power/performance policy trade-off.
      "RFC: /sys/power/policy_preference"
      http://lkml.org/lkml/2010/6/16/399
      That is my preference for implementing this capability,
      but I received no support on the list.
      
      So in September, 2010, I sent x86_energy_perf_policy.c to LKML,
      a user-space utility that scribbles directly to the MSR.
      http://lkml.org/lkml/2010/9/28/246
      
      
      
      Here is that same utility, after responding to some review feedback,
      to live in tools/power/, where it is easily found.
      Signed-off-by: default avatarLen Brown <len.brown@intel.com>
      d5532ee7
    • Len Brown's avatar
      tools: create power/x86/turbostat · 103a8fea
      Len Brown authored
      
      
      turbostat is a Linux tool to observe proper operation
      of Intel(R) Turbo Boost Technology.
      
      turbostat displays the actual processor frequency
      on x86 processors that include APERF and MPERF MSRs.
      
      Note that turbostat is of limited utility on Linux
      kernels 2.6.29 and older, as acpi_cpufreq cleared
      APERF/MPERF up through that release.
      
      On Intel Core i3/i5/i7 (Nehalem) and newer processors,
      turbostat also displays residency in idle power saving states,
      which are necessary for diagnosing any cpuidle issues
      that may have an effect on turbo-mode.
      
      See the turbostat.8 man page for example usage.
      Signed-off-by: default avatarLen Brown <len.brown@intel.com>
      103a8fea