1. 18 Jul, 2014 3 commits
    • Mark Rutland's avatar
      arm64: add runtime system sanity checks · 127161aa
      Mark Rutland authored
      Unexpected variation in certain system register values across CPUs is an
      indicator of potential problems with a system. The kernel expects CPUs
      to be mostly identical in terms of supported features, even in systems
      with heterogeneous CPUs, with uniform instruction set support being
      critical for the correct operation of userspace.
      
      To help detect issues early where hardware violates the expectations of
      the kernel, this patch adds simple runtime sanity checks on important ID
      registers in the bring up path of each CPU.
      
      Where CPUs are fundamentally mismatched, set TAINT_CPU_OUT_OF_SPEC.
      Given that the kernel assumes CPUs are identical feature wise, let's not
      pretend that we expect such configurations to work. Supporting such
      configurations would require massive rework, and hopefully they will
      never exist.
      Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
      Reviewed-by: default avatarWill Deacon <will.deacon@arm.com>
      Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      127161aa
    • Mark Rutland's avatar
      arm64: cachetype: report weakest cache policy · 59ccc0d4
      Mark Rutland authored
      In big.LITTLE systems, the I-cache policy may differ across CPUs, and
      thus we must always meet the most stringent maintenance requirements of
      any I-cache in the system when performing maintenance to ensure
      correctness. Unfortunately this requirement is not met as we always look
      at the current CPU's cache type register to determine the maintenance
      requirements.
      
      This patch causes the I-cache policy of all CPUs to be taken into
      account for icache_is_aliasing and icache_is_aivivt. If any I-cache in
      the system is aliasing or AIVIVT, the respective function will return
      true. At boot each CPU may set flags to identify that at least one
      I-cache in the system is aliasing and/or AIVIVT.
      
      The now unused and potentially misleading icache_policy function is
      removed.
      Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Reviewed-by: default avatarWill Deacon <will.deacon@arm.com>
      Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      59ccc0d4
    • Mark Rutland's avatar
      arm64: cpuinfo: record cpu system register values · df857416
      Mark Rutland authored
      Several kernel subsystems need to know details about CPU system register
      values, sometimes for CPUs other than that they are executing on. Rather
      than hard-coding system register accesses and cross-calls for these
      cases, this patch adds logic to record various system register values at
      boot-time. This may be used for feature reporting, firmware bug
      detection, etc.
      
      Separate hooks are added for the boot and hotplug paths to enable
      one-time intialisation and cold/warm boot value mismatch detection in
      later patches.
      Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
      Reviewed-by: default avatarWill Deacon <will.deacon@arm.com>
      Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      df857416