1. 09 Jun, 2015 5 commits
  2. 01 Jun, 2015 2 commits
    • Michal Kazior's avatar
      ath10k: fix possible ps sleep crash · 0bcbbe67
      Michal Kazior authored
      If probing failed pci sleep timer could remain
      running and trigger after ath10k structures were
      freed causing invalid pointer dereference:
      
       BUG: unable to handle kernel paging request at ffffc90001c80004
       IP: [<ffffffff81354728>] iowrite32+0x38/0x40
       ...
       Call Trace:
        <IRQ>
        [<ffffffffa00da048>] ? __ath10k_pci_sleep+0x48/0x60 [ath10k_pci]
        [<ffffffffa00da44e>] ath10k_pci_ps_timer+0x5e/0x80 [ath10k_pci]
        [<ffffffff810b210e>] call_timer_fn+0x3e/0x120
        [<ffffffffa00da3f0>] ? ath10k_pci_wake+0x150/0x150 [ath10k_pci]
        [<ffffffff810b3d11>] run_timer_softirq+0x201/0x2e0
        [<ffffffff8105d73f>] __do_softirq+0xaf/0x290
        [<ffffffff8105da95>] irq_exit+0x95/0xa0
        [<ffffffff81950406>] smp_apic_timer_interrupt+0x46/0x60
        [<ffffffff8194e77e>] apic_timer_interrupt+0x6e/0x80
      
      Fixes: 77258d40
      
       ("ath10k: enable pci soc powersaving")
      Signed-off-by: default avatarMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
      0bcbbe67
    • Rajkumar Manoharan's avatar
      ath10k: bypass PLL setting on target init for QCA9888 · 163f5264
      Rajkumar Manoharan authored
      
      
      Some of of qca988x solutions are having global reset issue
      during target initialization. Bypassing PLL setting before
      downloading firmware and letting the SoC run on REF_CLK is fixing
      the problem. Corresponding firmware change is also needed to set
      the clock source once the target is initialized. Since 10.2.4
      firmware is having this ROM patch, applying skip_clock_init only
      for 10.2.4 firmware versions.
      Signed-off-by: default avatarRajkumar Manoharan <rmanohar@qti.qualcomm.com>
      Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
      163f5264
  3. 29 May, 2015 4 commits
    • Michal Kazior's avatar
      ath10k: add missing firmware declarations · e451c1db
      Michal Kazior authored
      
      
      This could lead userspace initram images getting
      built without necessary firmware files included
      leading to probing failures of ath10k on boot with
      QCA61X4.
      Signed-off-by: default avatarMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
      e451c1db
    • Michal Kazior's avatar
      ath10k: fix inconsistent survey reports · 44b7d483
      Michal Kazior authored
      
      
      In some cases some channel survey data was
      reported incorrect.
      
      Channel info events were expected to come in pairs
      without and with COMPLETE flag set respectively
      for each channel visit during scan.
      
      The known deviation from this is rule for last
      scan chan info and first (next) scan chan info
      both have COMPLETE flag set. This was either
      programmed with the intent of providing BSS cycle
      count info or this is an artefact of firmware scan
      state machine. Either way this is useless due to
      short wraparound time, wraparound quirks and no
      overflow notification.
      
      Survey dumps now include only data gathered during
      scan channel visits that can be computed
      correctly.
      
      This should improve hostapd ACS a little bit.
      Reported-by: default avatarSrinivasa Duvvuri <sduvvuri@chromium.org>
      Signed-off-by: default avatarMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
      44b7d483
    • Michal Kazior's avatar
      ath10k: handle cycle counter wraparound · 587f7031
      Michal Kazior authored
      
      
      When QCA988X cycle counter HW register wraps
      around it resets to 0x7fffffff instead of 0. All
      other cycle counter related registers are divided
      by 2 so they never wraparound themselves. QCA61X4
      has a uniform CC and it wraparounds in a regular
      fashion though.
      
      Worst case wraparound time is approx 24 seconds
      (2**31 / 88MHz). Since scan channel visit times
      are max 5 seconds (offchannel case) it is
      guaranteed there's been at most 1 wraparound and
      it is possible to compute survey active time
      value. It is, however, impossible to determine the
      point at which Rx Clear Count has been divided by
      two so it is not reported upon wraparound.
      
      This fixes some occasional incorrect survey data
      on QCA988X as some channels (depending on how/when
      scan/offchannel requests were requested) would
      have approx 24 sec active time which wasn't
      actually the case.
      
      This should improve hostapd ACS a little bit.
      Reported-by: default avatarSrinivasa Duvvuri <sduvvuri@chromium.org>
      Signed-off-by: default avatarMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
      587f7031
    • Michal Kazior's avatar
      ath10k: move cycle_count macro · 0936ea3f
      Michal Kazior authored
      
      
      The macro isn't WMI specific. Instead it is
      related to hardware chip so move the macro
      accordingly. While at it document the magic value.
      Signed-off-by: default avatarMichal Kazior <michal.kazior@tieto.com>
      Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
      0936ea3f
  4. 24 May, 2015 10 commits
  5. 22 May, 2015 7 commits
  6. 21 May, 2015 12 commits