1. 28 Mar, 2012 1 commit
    • Rusty Russell's avatar
      remove references to cpu_*_map in arch/ · 0b5f9c00
      Rusty Russell authored
      This has been obsolescent for a while; time for the final push.
      In adjacent context, replaced old cpus_* with cpumask_*.
      Signed-off-by: default avatarRusty Russell <rusty@rustcorp.com.au>
      Acked-by: David S. Miller <davem@davemloft.net> (arch/sparc)
      Acked-by: Chris Metcalf <cmetcalf@tilera.com> (arch/tile)
      Cc: user-mode-linux-devel@lists.sourceforge.net
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: Richard Kuo <rkuo@codeaurora.org>
      Cc: linux-hexagon@vger.kernel.org
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: Kyle McMartin <kyle@mcmartin.ca>
      Cc: Helge Deller <deller@gmx.de>
      Cc: sparclinux@vger.kernel.org
  2. 31 Oct, 2011 1 commit
  3. 09 Jun, 2011 1 commit
  4. 02 Jun, 2011 1 commit
    • Daniel Hellstrom's avatar
      sparc32,leon: add GRPCI2 PCI Host driver · 5d07b786
      Daniel Hellstrom authored
      The DMA region must be accessible in order for PCI peripheral
      drivers to work, the sparc32 has DMA in the normal memory
      zone which requires the GRPCI2 to PCI target BARs so that all
      kernel low mem (192MB) can be mapped 1:1 to PCI address
      space. The GRPCI2 has resizeable target BARs, by default the
      first is made 256MB and all other BARs are disabled.
      I/O space are always located on 0x1000-0x10000, but accessed
      through the GRPCI2 PCI I/O Window memory mapped to virtual
      address space.
      Configuration space is accessed through the 64KB GRPCI2 PCI
      CFG Window using LDA bypassing the MMU.
      The GRPCI2 has a single PCI Window for prefetchable and non-
      prefetchable address space, it is up to the AHB master
      requesting PCI data to determine access type. Memory space
      is mapped 1:1.
      The GRPCI2 core can be configured in 4 different IRQ modes,
      where PCI Interrupt, Error Interrupt and DMA Interrupt are
      shared on a single IRQ line or at most 5 IRQs are used. The
      GRPCI2 can mask/unmask PCI interrupts, Err and DMA in the control
      and check status bits which tells us which IRQ really happended.
      The GENIRQ layer is used to unmask/mask each individual IRQ
      source by creating virtual IRQs and implementing a IRQ chip.
      The optional DMA functionality of the GRPCI2 is not supported
      by this patch.
      Signed-off-by: default avatarDaniel Hellstrom <daniel@gaisler.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
  5. 21 Apr, 2011 8 commits
  6. 19 Apr, 2011 1 commit
    • Sam Ravnborg's avatar
      sparc32: genirq support · 6baa9b20
      Sam Ravnborg authored
      The conversion of sparc32 to genirq is based on original work done
      by David S. Miller.
      Daniel Hellstrom has helped in the conversion and implemented
      the shutdowm functionality.
      Marcel van Nies <morcles@gmail.com> has tested this on Sparc Station 20
      Test status:
      sun4c      - not tested
      sun4m,pci  - not tested
      sun4m,sbus - tested (Sparc Classic, Sparc Station 5, Sparc Station 20)
      sun4d      - not tested
      leon       - tested on various combinations of leon boards,
                   including SMP variants
         Introduce use of GENERIC_HARDIRQS and GENERIC_IRQ_SHOW
         Allocate 64 IRQs - which is enough even for SS2000
         Use a table of irq_bucket to maintain uses IRQs
            irq_bucket is also used to chain several irq's that
            must be called when the same intrrupt is asserted
         Use irq_link to link a interrupt source to the irq
         All plafforms must now supply their own build_device_irq method
         handler_irq rewriten to use generic irq support
         Read FLOPPY_IRQ from platform device
         Use generic request_irq to register the floppy interrupt
         Rewrote sparc_floppy_irq to use the generic irq support
         Introduce irq_chip
         Store mask in chip_data for use in mask/unmask functions
         Add build_device_irq for pcic
         Use pcic_build_device_irq in pci_time_init
         allocate virtual irqs in pcic_fill_irq
         Introduce irq_chip
         Store mask in chip_data for use in mask/unmask functions
         Add build_device_irq for sun4c
         Use sun4c_build_device_irq in sun4c_init_timers
         Introduce irq_chip
         Introduce dedicated mask/unmask methods
         Introduce sun4m_handler_data that allow easy access to necessary
           data in the mask/unmask functions
         Add a helper method to enable profile_timer (used from smp)
         Added sun4m_build_device_irq
         Use sun4m_build_device_irq in sun4m_init_timers
            There is no replacement for smp_rotate that always scheduled
            next CPU as interrupt target upon an interrupt
         Introduce irq_chip
         Introduce dedicated mask/unmask methods
         Introduce sun4d_handler_data that allow easy access to
         necessary data in mask/unmask fuctions
         Rewrote sun4d_handler_irq to use generic irq support
            The original implmentation of enable/disable had:
                if (irq < NR_IRQS)
            The new implmentation does not distingush between SBUS and cpu
            I am no sure what is right here. I assume we need to do
            something for the cpu interrupts.
            I have not succeeded booting my sun4d box (with or without this patch)
            and my understanding of this platfrom is limited.
            So I would be a bit suprised if this works.
         Introduce irq_chip
         Store mask in chip_data for use in mask/unmask functions
         Add build_device_irq for leon
         Use leon_build_device_irq in leon_init_timers
      Signed-off-by: default avatarSam Ravnborg <sam@ravnborg.org>
      Acked-by: default avatarDaniel Hellstrom <daniel@gaisler.com>
      Tested-by: default avatarDaniel Hellstrom <daniel@gaisler.com>
      Tested-by: default avatarMarcel van Nies <morcles@gmail.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
  7. 16 Mar, 2011 2 commits
  8. 04 Jan, 2011 4 commits
  9. 29 Oct, 2010 1 commit
  10. 12 Oct, 2010 1 commit
  11. 30 Mar, 2010 1 commit
    • Tejun Heo's avatar
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo authored
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      The script does the followings.
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      * When the script inserts a new include, it looks at the include
  12. 22 Feb, 2010 1 commit
  13. 12 Feb, 2010 1 commit
  14. 09 Feb, 2010 1 commit
  15. 02 Nov, 2009 1 commit
  16. 17 Aug, 2009 1 commit