1. 10 Nov, 2011 1 commit
  2. 24 Oct, 2011 2 commits
  3. 13 Oct, 2011 1 commit
  4. 26 Aug, 2011 2 commits
  5. 07 May, 2011 1 commit
  6. 12 Apr, 2011 1 commit
    • Jacob Pan's avatar
      x86/mrst: Fix boot crash caused by incorrect pin to irq mapping · 9d90e49d
      Jacob Pan authored
      Moorestown systems crash on boot because the secondary CPU
      clockevent (apbt1) will fail to request irq#1, which does not
      have ioapic chip in its irq_desc[] entry.
      
      Background:
      
      Moorestown platform does not have ISA bus nor legacy IRQs. It
      reuses the range of legacy IRQs for regular device interrupts.
      The routing information of early system device IRQs (timers) are
      obtained from firmware provided SFI tables. We reuse/fake MP
      configuration table to facilitate IRQ setup with IOAPIC.
      
      Maintaining a 1:1 mapping of IOAPIC pin (RTE entry) and IRQ#
      makes routing information clean and easy to understand on
      Moorestown. Though optional.
      
      This patch allows SFI timer and vRTC IRQ to be treated as ISA
      IRQ so that pin2irq mapping will be 1:1.
      
      Also fixed MP table type and use macros to clearly set MP IRQ
      entries. As a result, apbt timer and RTC interrupts on
      Moorestown are within legacy IRQ range:
      
       # cat /proc/interrupts
                  CPU0       CPU1
         0:      11249          0   IO-APIC-edge      apbt0
         1:          0      12271   IO-APIC-edge      apbt1
         8:        887          0   IO-APIC-fasteoi   dw_spi
        13:          0          0   IO-APIC-fasteoi   INTEL_MID_DMAC2
        14:          0          0   IO-APIC-fasteoi   rtc0
      
      Further discussion of this patch can be found at:
      
        https://lkml.org/lkml/2010/6/10/70Suggested-by: default avatar"Eric W. Biederman" <ebiederm@xmission.com>
      Signed-off-by: default avatarJacob Pan <jacob.jun.pan@linux.intel.com>
      Cc: Feng Tang <feng.tang@intel.com>
      Cc: Alan Cox <alan@linux.intel.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Link: http://lkml.kernel.org/r/1302286980-21139-1-git-send-email-jacob.jun.pan@linux.intel.comSigned-off-by: default avatarIngo Molnar <mingo@elte.hu>
      9d90e49d
  7. 14 Feb, 2011 1 commit
  8. 09 Dec, 2010 1 commit
  9. 11 Nov, 2010 4 commits
  10. 09 Nov, 2010 2 commits
    • Jacob Pan's avatar
      x86: mrst: Parse SFI timer table for all timer configs · 7f05dec3
      Jacob Pan authored
      Penwell has APB timer based watchdog timers, it requires platform code to parse
      SFI MTMR tables in order to claim its timer.
      
      This patch will always parse SFI MTMR regardless of system timer configuration
      choices. Otherwise, SFI MTMR table may not get parsed if running on Medfield
      with always-on local APIC timers and constant TSC. Watchdog timer driver will
      then not get a timer to use.
      Signed-off-by: default avatarJacob Pan <jacob.jun.pan@linux.intel.com>
      Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
      LKML-Reference: <20101109112800.20591.10802.stgit@localhost.localdomain>
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      7f05dec3
    • Feng Tang's avatar
      x86/mrst: Add SFI platform device parsing code · 1da4b1c6
      Feng Tang authored
      SFI provides a series of tables. These describe the platform devices present
      including SPI and I²C devices, as well as various sensors, keypads and other
      glue as well as interfaces provided via the SCU IPC mechanism (intel_scu_ipc.c)
      
      This patch is a merge of the core elements and relevant fixes from the
      Intel development code by Feng, Alek, myself into a single coherent patch
      for upstream submission.
      
      It provides the needed infrastructure to register I2C, SPI and platform devices
      described by the tables, as well as handlers for some of the hardware already
      supported in kernel. The 0.8 firmware also provides GPIO tables.
      
      Devices are created at boot time or if they are SCU dependant at the point an
      SCU is discovered. The existing Linux device mechanisms will then handle the
      device binding. At an abstract level this is an SFI to Linux device translator.
      
      Device/platform specific setup/glue is in this file. This is done so that the
      drivers for the generic I²C and SPI bus devices remain cross platform as they
      should.
      
      (Updated from RFC version to correct the emc1403 name used by the firmware
       and a wrongly used #define)
      Signed-off-by: default avatarAlek Du <alek.du@linux.intel.com>
      LKML-Reference: <20101109112158.20013.6158.stgit@localhost.localdomain>
      [Clean ups, removal of 0.7 support]
      Signed-off-by: default avatarFeng Tang <feng.tang@linux.intel.com>
      [Clean ups]
      Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      1da4b1c6
  11. 27 Oct, 2010 1 commit
  12. 07 Jul, 2010 1 commit
  13. 19 May, 2010 4 commits
  14. 16 May, 2010 1 commit
    • Jacob Pan's avatar
      x86, mrst: add nop functions to x86_init mpparse functions · fea24e28
      Jacob Pan authored
      Moorestown does not have BIOS provided MP tables, we can save some time
      by avoiding scaning of these tables. e.g.
      [    0.000000] Scan SMP from c0000000 for 1024 bytes.
      [    0.000000] Scan SMP from c009fc00 for 1024 bytes.
      [    0.000000] Scan SMP from c00f0000 for 65536 bytes.
      [    0.000000] Scan SMP from c00bfff0 for 1024 bytes.
      
      Searching EBDA with the base at 0x40E will also result in random pointer
      deferencing within 1MB. This can be a problem in Lincroft if the pointer
      hits VGA area and VGA mode is not enabled.
      Signed-off-by: default avatarJacob Pan <jacob.jun.pan@linux.intel.com>
      LKML-Reference: <1273873281-17489-8-git-send-email-jacob.jun.pan@linux.intel.com>
      Acked-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
      fea24e28
  15. 24 Feb, 2010 5 commits
  16. 31 Aug, 2009 1 commit