1. 13 Jun, 2016 1 commit
    • Mika Westerberg's avatar
      PCI: Add runtime PM support for PCIe ports · 006d44e4
      Mika Westerberg authored
      Add back runtime PM support for PCIe ports that was removed by
      fe9a743a ("PCI/PM: Drop unused runtime PM support code for PCIe
      We cannot enable it automatically for all ports since there have been
      problems previously [1].  In summary suspended PCIe ports were not able
      to deal with ACPI-based hotplug reliably.  One reason why this might happen
      is the fact that when a PCIe port is powered down, config space access to
      the devices behind the port is not possible.  If the BIOS hotplug SMI
      handler assumes the port is always in D0 it will not be able to find the
      hotplugged devices.  To be on the safe side only enable runtime PM if the
      port does not claim to support hotplug.
      For PCIe ports not using hotplug, we enable and allow runtime PM
      automatically.  Since 'bridge_d3' can be changed any time we check this in
      driver ->runtime_idle() and ->runtime_suspend() and only allow runtime
      suspend if the flag is still set.  Use autosuspend with default of 100ms
      idle time to prevent the port from repeatedly suspending and resuming on
      continuous configuration space access of devices behind the port.
      The actual power transition to D3 and back is handled in the PCI core.
      Idea to automatically unblock (allow) runtime PM for PCIe ports came from
      Dave Airlie.
      [1] https://bugzilla.kernel.org/show_bug.cgi?id=53811
      This includes a fix for lockdep issue reported by Valdis Kletnieks.
      Tested-by: default avatarLukas Wunner <lukas@wunner.de>
      Signed-off-by: default avatarLukas Wunner <lukas@wunner.de>
      Signed-off-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
  2. 04 May, 2016 1 commit
  3. 03 May, 2016 2 commits
  4. 08 Apr, 2016 1 commit
  5. 14 Jul, 2015 1 commit
  6. 24 Apr, 2014 1 commit
  7. 14 Apr, 2014 1 commit
  8. 03 Jan, 2014 1 commit
    • Alexander Gordeev's avatar
      PCI/MSI: Add pci_msix_vec_count() · ff1aa430
      Alexander Gordeev authored
      This creates an MSI-X counterpart for pci_msi_vec_count().  Device drivers
      can use this function to obtain maximum number of MSI-X interrupts the
      device supports and use that number in a subsequent call to
      pci_msix_vec_count() supersedes pci_msix_table_size() and returns a
      negative errno if device does not support MSI-X interrupts.  After this
      update, callers must always check the returned value.
      The only user of pci_msix_table_size() was the PCI-Express port driver,
      which is also updated by this change.
      Signed-off-by: default avatarAlexander Gordeev <agordeev@redhat.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: default avatarTejun Heo <tj@kernel.org>
  9. 19 Dec, 2013 3 commits
  10. 13 Dec, 2013 1 commit
  11. 14 Nov, 2013 1 commit
  12. 01 Nov, 2013 1 commit
    • Andrew Murray's avatar
      PCI: Update pcie_ports 'auto' behavior for non-ACPI platforms · 6b87e700
      Andrew Murray authored
      The pcie_ports parameter, which defaults to 'auto', allows a user
      to specify if PCIe port services are disabled ('compat'), always
      enabled ('native'), or only used when allowed by the BIOS
      Where CONFIG_ACPI isn't enabled, as is often the case for non
      x86/ia64 platforms, the 'auto' behavior results in that of
      'compat'. Thus in order to use port services on these platforms
      'pcie_ports=native' must be added to the kernel command line.
      This patch results in the 'native' behavior being followed where
      'auto' is selected and ACPI is not enabled.
      Signed-off-by: default avatarAndrew Murray <amurray@embedded-bits.co.uk>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
  13. 30 Jan, 2013 1 commit
  14. 07 Dec, 2012 1 commit
  15. 05 Nov, 2012 1 commit
  16. 07 Sep, 2012 1 commit
  17. 23 Aug, 2012 2 commits
  18. 07 May, 2012 1 commit
  19. 23 Feb, 2012 1 commit
    • MUNEDA Takahiro's avatar
      PCI: Add pcie_hp=nomsi to disable MSI/MSI-X for pciehp driver · 7570a333
      MUNEDA Takahiro authored
      Add a parameter to avoid using MSI/MSI-X for PCIe native hotplug; it's
      known to be buggy on some platforms.
      In my environment, while shutting down, following stack trace is shown
        irq 16: nobody cared (try booting with the "irqpoll" option)
        Pid: 1081, comm: reboot Not tainted 3.2.0 #1
        Call Trace:
         <IRQ>  [<ffffffff810cec1d>] __report_bad_irq+0x3d/0xe0
         [<ffffffff810cee1c>] note_interrupt+0x15c/0x210
         [<ffffffff810cc485>] handle_irq_event_percpu+0xb5/0x210
         [<ffffffff810cc621>] handle_irq_event+0x41/0x70
         [<ffffffff810cf675>] handle_fasteoi_irq+0x55/0xc0
         [<ffffffff81015356>] handle_irq+0x46/0xb0
         [<ffffffff814fbe9d>] do_IRQ+0x5d/0xe0
         [<ffffffff814f146e>] common_interrupt+0x6e/0x6e
         [<ffffffff8106b040>] ? __do_softirq+0x60/0x210
         [<ffffffff8108aeb1>] ? hrtimer_interrupt+0x151/0x240
         [<ffffffff814fb5ec>] call_softirq+0x1c/0x30
         [<ffffffff810152d5>] do_softirq+0x65/0xa0
         [<ffffffff8106ae9d>] irq_exit+0xbd/0xe0
         [<ffffffff814fbf8e>] smp_apic_timer_interrupt+0x6e/0x99
         [<ffffffff814f9e5e>] apic_timer_interrupt+0x6e/0x80
         <EOI>  [<ffffffff814f0fb1>] ? _raw_spin_unlock_irqrestore+0x11/0x20
         [<ffffffff812629fc>] pci_bus_write_config_word+0x6c/0x80
         [<ffffffff81266fc2>] pci_intx+0x52/0xa0
         [<ffffffff8127de3d>] pci_intx_for_msi+0x1d/0x30
        [<ffffffff8127e4fb>] pci_msi_shutdown+0x7b/0x110
         [<ffffffff81269d34>] pci_device_shutdown+0x34/0x50
         [<ffffffff81326c4f>] device_shutdown+0x2f/0x140
         [<ffffffff8107b981>] kernel_restart_prepare+0x31/0x40
         [<ffffffff8107b9e6>] kernel_restart+0x16/0x60
         [<ffffffff8107bbfd>] sys_reboot+0x1ad/0x220
         [<ffffffff814f4b90>] ? do_page_fault+0x1e0/0x460
         [<ffffffff811942d0>] ? __sync_filesystem+0x90/0x90
         [<ffffffff8105c9aa>] ? __cond_resched+0x2a/0x40
         [<ffffffff814ef090>] ? _cond_resched+0x30/0x40
         [<ffffffff81169e17>] ? iterate_supers+0xb7/0xd0
         [<ffffffff814f9382>] system_call_fastpath+0x16/0x1b
        [<ffffffff8138a0f0>] usb_hcd_irq
        [<ffffffff8138a0f0>] usb_hcd_irq
        [<ffffffff8138a0f0>] usb_hcd_irq
        Disabling IRQ #16
      An un-wanted interrupt is generated when PCI driver switches from
      MSI/MSI-X to INTx while shutting down the device.  The interrupt does
      not happen if MSI/MSI-X is not used on the device.
      I confirmed that this problem does not happen if pcie_hp=nomsi was
      specified and hotplug operation worked fine as usual.
      v2: Automatically disable MSI/MSI-X against following device:
          PCI bridge: Integrated Device Technology, Inc. Device 807f (rev 02)
      v3: Based on the review comment, combile the if statements.
      v4: Removed module parameter.
          Move some code to build pciehp as a module.
          Move device specific code to driver/pci/quirks.c.
      v5: Drop a device specific code until getting a vendor statement.
      Reviewed-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: default avatarMUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
  20. 21 Mar, 2011 1 commit
    • Naga Chumbalkar's avatar
      PCI: Disable ASPM when _OSC control is not granted for PCIe services · eca67315
      Naga Chumbalkar authored
      v3 -> v2: Added text to describe the problem
      v2 -> v1: Split this patch from v1
      v1	: Part of: http://marc.info/?l=linux-pci&m=130042212003242&w=2
      Disable ASPM when no _OSC control for PCIe services is granted
      by the BIOS. This is to protect systems with a buggy BIOS that
      did not set the ACPI FADT "ASPM Controls" bit even though the
      underlying HW can't do ASPM.
      To turn "on" ASPM the minimum the BIOS needs to do:
      1. Clear the ACPI FADT "ASPM Controls" bit.
      2. Support _OSC appropriately
      There is no _OSC Control bit for ASPM. However, we expect the BIOS to
      support _OSC for a Root Bridge that originates a PCIe hierarchy. If this
      is not the case - we are better off not enabling ASPM on that server.
      Commit 852972ac (ACPI: Disable ASPM if the
      Platform won't provide _OSC control for PCIe) describes the above scenario.
      To quote verbatim from there:
      [The PCI SIG documentation for the _OSC OS/firmware handshaking interface
      "If the _OSC control method is absent from the scope of a host bridge
      device, then the operating system must not enable or attempt to use any
      features defined in this section for the hierarchy originated by the host
      The obvious interpretation of this is that the OS should not attempt to use
      PCIe hotplug, PME or AER - however, the specification also notes that an
      _OSC method is *required* for PCIe hierarchies, and experimental validation
      with An Alternative OS indicates that it doesn't use any PCIe functionality
      if the _OSC method is missing. That arguably means we shouldn't be using
      MSI or extended config space, but right now our problems seem to be limited
      to vendors being surprised when ASPM gets enabled on machines when other
      OSs refuse to do so. So, for now, let's just disable ASPM if the _OSC
      method doesn't exist or refuses to hand over PCIe capability control.]
      Signed-off-by: default avatarNaga Chumbalkar <nagananda.chumbalkar@hp.com>
      Cc: Rafael J. Wysocki <rjw@sisk.pl>
      Cc: Matthew Garrett <mjg59@srcf.ucam.org>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
  21. 23 Dec, 2010 1 commit
    • Rafael J. Wysocki's avatar
      PCI/PCIe: Clear Root PME Status bits early during system resume · fe31e697
      Rafael J. Wysocki authored
      I noticed that PCI Express PMEs don't work on my Toshiba Portege R500
      after the system has been woken up from a sleep state by a PME
      (through Wake-on-LAN).  After some investigation it turned out that
      the BIOS didn't clear the Root PME Status bit in the root port that
      received the wakeup PME and since the Requester ID was also set in
      the port's Root Status register, any subsequent PMEs didn't trigger
      This problem can be avoided by clearing the Root PME Status bits in
      all PCI Express root ports during early resume.  For this purpose,
      add an early resume routine to the PCIe port driver and make this
      driver be always registered, even if pci_ports_disable is set (in
      which case the driver's only function is to provide the early
      resume callback).
      Signed-off-by: default avatarRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
  22. 24 Aug, 2010 3 commits
    • Rafael J. Wysocki's avatar
      PCI: PCIe: Disable PCIe port services during port initialization · 2bd50dd8
      Rafael J. Wysocki authored
      In principle PCIe port services may be enabled by the BIOS, so it's
      better to disable them during port initialization to avoid spurious
      events from being generated.
      Signed-off-by: default avatarRafael J. Wysocki <rjw@sisk.pl>
      Reviewed-by: default avatarHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
    • Rafael J. Wysocki's avatar
      PCI: PCIe: Ask BIOS for control of all native services at once · 28eb5f27
      Rafael J. Wysocki authored
      After commit 852972ac (ACPI: Disable
      ASPM if the platform won't provide _OSC control for PCIe) control of
      the PCIe Capability Structure is unconditionally requested by
      acpi_pci_root_add(), which in principle may cause problems to
      happen in two ways.  First, the BIOS may refuse to give control of
      the PCIe Capability Structure if it is not asked for any of the
      _OSC features depending on it at the same time.  Second, the BIOS may
      assume that control of the _OSC features depending on the PCIe
      Capability Structure will be requested in the future and may behave
      incorrectly if that doesn't happen.  For this reason, control of
      the PCIe Capability Structure should always be requested along with
      control of any other _OSC features that may depend on it (ie. PCIe
      native PME, PCIe native hot-plug, PCIe AER).
      Rework the PCIe port driver so that (1) it checks which native PCIe
      port services can be enabled, according to the BIOS, and (2) it
      requests control of all these services simultaneously.  In
      particular, this causes pcie_portdrv_probe() to fail if the BIOS
      refuses to grant control of the PCIe Capability Structure, which
      means that no native PCIe port services can be enabled for the PCIe
      Root Complex the given port belongs to.  If that happens, ASPM is
      disabled to avoid problems with mishandling it by the part of the
      PCIe hierarchy for which control of the PCIe Capability Structure
      has not been received.
      Make it possible to override this behavior using 'pcie_ports=native'
      (use the PCIe native services regardless of the BIOS response to the
      control request), or 'pcie_ports=compat' (do not use the PCIe native
      services at all).
      Accordingly, rework the existing PCIe port service drivers so that
      they don't request control of the services directly.
      Signed-off-by: default avatarRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
    • Rafael J. Wysocki's avatar
      PCI: PCIe: Introduce commad line switch for disabling port services · 79dd9182
      Rafael J. Wysocki authored
      Introduce kernel command line switch pcie_ports= allowing one to
      disable all of the native PCIe port services, so that PCIe ports
      are treated like PCI-to-PCI bridges.
      Signed-off-by: default avatarRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
  23. 26 Feb, 2010 1 commit
    • Rafael J. Wysocki's avatar
      PM: Allow PCI devices to suspend/resume asynchronously · a1e4d72c
      Rafael J. Wysocki authored
      Set power.async_suspend for all PCI devices and PCIe port services,
      so that they can be suspended and resumed in parallel with other
      devices they don't depend on in a known way (i.e. devices which are
      not their parents or children).
      This only affects the "regular" suspend and resume stages, which
      means in particular that the restoration of the PCI devices' standard
      configuration registers during resume will still be carried out
      synchronously (at the "early" resume stage).
      Signed-off-by: default avatarRafael J. Wysocki <rjw@sisk.pl>
  24. 22 Feb, 2010 1 commit
    • Rafael J. Wysocki's avatar
      PCI PM: Make it possible to force using INTx for PCIe PME signaling · c39fae14
      Rafael J. Wysocki authored
      Apparently, some machines may have problems with PCI run-time power
      management if MSIs are used for the native PCIe PME signaling.  In
      particular, on the MSI Wind U-100 PCIe PME interrupts are not
      generated by a PCIe root port after a resume from suspend to RAM, if
      the system wake-up was triggered by a PME from the device attached to
      this port.  [It doesn't help to free the interrupt on suspend and
      request it back on resume, even if that is done along with disabling
      the MSI and re-enabling it, respectively.]  However, if INTx
      interrupts are used for this purpose on the same machine, everything
      works just fine.
      For this reason, add a kernel command line switch allowing one to
      request that MSIs be not used for the native PCIe PME signaling,
      introduce a DMI table allowing us to blacklist machines that need
      this switch to be set by default and put the MSI Wind U-100 into this
      Signed-off-by: default avatarRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
  25. 04 Jan, 2010 1 commit
  26. 04 Dec, 2009 9 commits