Commit ff3df54e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'irq-fixes' of git://git.parisc-linux.org/git/linux-2.6

* 'irq-fixes' of git://git.parisc-linux.org/git/linux-2.6:
  [PARISC] More pt_regs removal
  [PARISC] pdc_init no longer exists
  [PARISC] Make firmware calls irqsafe-ish...
  [PA-RISC] Fix boot breakage
  [PARISC] Use set_irq_regs
parents c7111c13 c7753f18
......@@ -424,7 +424,7 @@ struct parisc_device * create_tree_node(char id, struct device *parent)
/* make the generic dma mask a pointer to the parisc one */
dev->dev.dma_mask = &dev->dma_mask;
dev->dev.coherent_dma_mask = dev->dma_mask;
if (!device_register(&dev->dev)) {
if (device_register(&dev->dev)) {
kfree(dev);
return NULL;
}
......@@ -853,9 +853,9 @@ static void print_parisc_device(struct parisc_device *dev)
*/
void init_parisc_bus(void)
{
if (!bus_register(&parisc_bus_type))
if (bus_register(&parisc_bus_type))
panic("Could not register PA-RISC bus type\n");
if (!device_register(&root))
if (device_register(&root))
panic("Could not register PA-RISC root device\n");
get_device(&root);
}
......
This diff is collapsed.
......@@ -347,12 +347,14 @@ static inline int eirr_to_irq(unsigned long eirr)
/* ONLY called from entry.S:intr_extint() */
void do_cpu_irq_mask(struct pt_regs *regs)
{
struct pt_regs *old_regs;
unsigned long eirr_val;
int irq, cpu = smp_processor_id();
#ifdef CONFIG_SMP
cpumask_t dest;
#endif
old_regs = set_irq_regs(regs);
local_irq_disable();
irq_enter();
......@@ -379,6 +381,7 @@ void do_cpu_irq_mask(struct pt_regs *regs)
out:
irq_exit();
set_irq_regs(old_regs);
return;
set_out:
......
......@@ -154,7 +154,7 @@ halt_processor(void)
irqreturn_t
ipi_interrupt(int irq, void *dev_id, struct pt_regs *regs)
ipi_interrupt(int irq, void *dev_id)
{
int this_cpu = smp_processor_id();
struct cpuinfo_parisc *p = &cpu_data[this_cpu];
......@@ -414,19 +414,6 @@ smp_flush_tlb_all(void)
on_each_cpu(flush_tlb_all_local, NULL, 1, 1);
}
void
smp_do_timer(struct pt_regs *regs)
{
int cpu = smp_processor_id();
struct cpuinfo_parisc *data = &cpu_data[cpu];
if (!--data->prof_counter) {
data->prof_counter = data->prof_multiplier;
update_process_times(user_mode(regs));
}
}
/*
* Called by secondaries to update state and initialize CPU registers.
*/
......
......@@ -34,10 +34,6 @@
static unsigned long clocktick __read_mostly; /* timer cycles per tick */
#ifdef CONFIG_SMP
extern void smp_do_timer(struct pt_regs *regs);
#endif
/*
* We keep time on PA-RISC Linux by using the Interval Timer which is
* a pair of registers; one is read-only and one is write-only; both
......@@ -55,13 +51,14 @@ extern void smp_do_timer(struct pt_regs *regs);
* held off for an arbitrarily long period of time by interrupts being
* disabled, so we may miss one or more ticks.
*/
irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
irqreturn_t timer_interrupt(int irq, void *dev_id)
{
unsigned long now;
unsigned long next_tick;
unsigned long cycles_elapsed, ticks_elapsed;
unsigned long cycles_remainder;
unsigned int cpu = smp_processor_id();
struct cpuinfo_parisc *cpuinfo = &cpu_data[cpu];
/* gcc can optimize for "read-only" case with a local clocktick */
unsigned long cpt = clocktick;
......@@ -69,7 +66,7 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
profile_tick(CPU_PROFILING);
/* Initialize next_tick to the expected tick time. */
next_tick = cpu_data[cpu].it_value;
next_tick = cpuinfo->it_value;
/* Get current interval timer.
* CR16 reads as 64 bits in CPU wide mode.
......@@ -120,7 +117,7 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
*/
next_tick = now + cycles_remainder;
cpu_data[cpu].it_value = next_tick;
cpuinfo->it_value = next_tick;
/* Skip one clocktick on purpose if we are likely to miss next_tick.
* We want to avoid the new next_tick being less than CR16.
......@@ -131,18 +128,19 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
next_tick += cpt;
/* Program the IT when to deliver the next interrupt. */
/* Only bottom 32-bits of next_tick are written to cr16. */
/* Only bottom 32-bits of next_tick are written to cr16. */
mtctl(next_tick, 16);
/* Done mucking with unreliable delivery of interrupts.
* Go do system house keeping.
*/
#ifdef CONFIG_SMP
smp_do_timer(regs);
#else
update_process_times(user_mode(regs));
#endif
if (!--cpuinfo->prof_counter) {
cpuinfo->prof_counter = cpuinfo->prof_multiplier;
update_process_times(user_mode(get_irq_regs()));
}
if (cpu == 0) {
write_seqlock(&xtime_lock);
do_timer(ticks_elapsed);
......@@ -319,13 +317,15 @@ void __init time_init(void)
start_cpu_itimer(); /* get CPU 0 started */
if(pdc_tod_read(&tod_data) == 0) {
write_seqlock_irq(&xtime_lock);
if (pdc_tod_read(&tod_data) == 0) {
unsigned long flags;
write_seqlock_irqsave(&xtime_lock, flags);
xtime.tv_sec = tod_data.tod_sec;
xtime.tv_nsec = tod_data.tod_usec * 1000;
set_normalized_timespec(&wall_to_monotonic,
-xtime.tv_sec, -xtime.tv_nsec);
write_sequnlock_irq(&xtime_lock);
write_sequnlock_irqrestore(&xtime_lock, flags);
} else {
printk(KERN_ERR "Error reading tod clock\n");
xtime.tv_sec = 0;
......
......@@ -774,8 +774,6 @@ int pdc_sti_call(unsigned long func, unsigned long flags,
unsigned long inptr, unsigned long outputr,
unsigned long glob_cfg);
extern void pdc_init(void);
static inline char * os_id_to_string(u16 os_id) {
switch(os_id) {
case OS_ID_NONE: return "No OS";
......
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