Revert "clk: avoid circular clock topology"
This reverts commit 858d5881. Joachim reports that this commit breaks lpc18xx boot. This is because the hardware has circular clk topology where PLLs can feed into dividers and the same dividers can feed into the PLLs. The hardware is designed this way so that you can choose to put the divider before the PLL or after the PLL depending on what you configure to be the parent of the divider and what you configure to be the parent of the PLL. So let's drop this patch for now because we have hardware that actually has loops. A future patch could check for circular parents when we change parents and fail the switch, but that's probably best left to some debugging Kconfig option so that we don't suffer the sanity checking cost all the time. Reported-by: Joachim Eastwood <firstname.lastname@example.org> Cc: Masahiro Yamada <email@example.com> Signed-off-by: Stephen Boyd <firstname.lastname@example.org>
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