Commit f5df8e26 authored by James Hogan's avatar James Hogan
Browse files

metag: Memory management



Add memory management files for metag.

Meta's 32bit virtual address space is split into two halves:
 - local (0x08000000-0x7fffffff): traditionally local to a hardware
   thread and incoherent between hardware threads. Each hardware thread
   has it's own local MMU table. On Meta2 the local space can be
   globally coherent (GCOn) if the cache partitions coincide.
 - global (0x88000000-0xffff0000): coherent and traditionally global
   between hardware threads. On Meta2, each hardware thread has it's own
   global MMU table.

The low 128MiB of each half is non-MMUable and maps directly to the
physical address space:
 - 0x00010000-0x07ffffff: contains Meta core registers and maps SoC bus
 - 0x80000000-0x87ffffff: contains low latency global core memories

Linux usually further splits the local virtual address space like this:
 - 0x08000000-0x3fffffff: user mappings
 - 0x40000000-0x7fffffff: kernel mappings
Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
parent 99ef7c2a
#ifndef __MMU_H
#define __MMU_H
#ifdef CONFIG_METAG_USER_TCM
#include <linux/list.h>
#endif
#ifdef CONFIG_HUGETLB_PAGE
#include <asm/page.h>
#endif
typedef struct {
/* Software pgd base pointer used for Meta 1.x MMU. */
unsigned long pgd_base;
#ifdef CONFIG_METAG_USER_TCM
struct list_head tcm;
#endif
#ifdef CONFIG_HUGETLB_PAGE
#if HPAGE_SHIFT < HUGEPT_SHIFT
/* last partially filled huge page table address */
unsigned long part_huge;
#endif
#endif
} mm_context_t;
/* Given a virtual address, return the pte for the top level 4meg entry
* that maps that address.
* Returns 0 (an empty pte) if that range is not mapped.
*/
unsigned long mmu_read_first_level_page(unsigned long vaddr);
/* Given a linear (virtual) address, return the second level 4k pte
* that maps that address. Returns 0 if the address is not mapped.
*/
unsigned long mmu_read_second_level_page(unsigned long vaddr);
/* Get the virtual base address of the MMU */
unsigned long mmu_get_base(void);
/* Initialize the MMU. */
void mmu_init(unsigned long mem_end);
#ifdef CONFIG_METAG_META21_MMU
/*
* For cpu "cpu" calculate and return the address of the
* MMCU_TnLOCAL_TABLE_PHYS0 if running in local-space or
* MMCU_TnGLOBAL_TABLE_PHYS0 if running in global-space.
*/
static inline unsigned long mmu_phys0_addr(unsigned int cpu)
{
unsigned long phys0;
phys0 = (MMCU_T0LOCAL_TABLE_PHYS0 +
(MMCU_TnX_TABLE_PHYSX_STRIDE * cpu)) +
(MMCU_TXG_TABLE_PHYSX_OFFSET * is_global_space(PAGE_OFFSET));
return phys0;
}
/*
* For cpu "cpu" calculate and return the address of the
* MMCU_TnLOCAL_TABLE_PHYS1 if running in local-space or
* MMCU_TnGLOBAL_TABLE_PHYS1 if running in global-space.
*/
static inline unsigned long mmu_phys1_addr(unsigned int cpu)
{
unsigned long phys1;
phys1 = (MMCU_T0LOCAL_TABLE_PHYS1 +
(MMCU_TnX_TABLE_PHYSX_STRIDE * cpu)) +
(MMCU_TXG_TABLE_PHYSX_OFFSET * is_global_space(PAGE_OFFSET));
return phys1;
}
#endif /* CONFIG_METAG_META21_MMU */
#endif
#ifndef __METAG_MMU_CONTEXT_H
#define __METAG_MMU_CONTEXT_H
#include <asm-generic/mm_hooks.h>
#include <asm/page.h>
#include <asm/mmu.h>
#include <asm/tlbflush.h>
#include <asm/cacheflush.h>
#include <linux/io.h>
static inline void enter_lazy_tlb(struct mm_struct *mm,
struct task_struct *tsk)
{
}
static inline int init_new_context(struct task_struct *tsk,
struct mm_struct *mm)
{
#ifndef CONFIG_METAG_META21_MMU
/* We use context to store a pointer to the page holding the
* pgd of a process while it is running. While a process is not
* running the pgd and context fields should be equal.
*/
mm->context.pgd_base = (unsigned long) mm->pgd;
#endif
#ifdef CONFIG_METAG_USER_TCM
INIT_LIST_HEAD(&mm->context.tcm);
#endif
return 0;
}
#ifdef CONFIG_METAG_USER_TCM
#include <linux/slab.h>
#include <asm/tcm.h>
static inline void destroy_context(struct mm_struct *mm)
{
struct tcm_allocation *pos, *n;
list_for_each_entry_safe(pos, n, &mm->context.tcm, list) {
tcm_free(pos->tag, pos->addr, pos->size);
list_del(&pos->list);
kfree(pos);
}
}
#else
#define destroy_context(mm) do { } while (0)
#endif
#ifdef CONFIG_METAG_META21_MMU
static inline void load_pgd(pgd_t *pgd, int thread)
{
unsigned long phys0 = mmu_phys0_addr(thread);
unsigned long phys1 = mmu_phys1_addr(thread);
/*
* 0x900 2Gb address space
* The permission bits apply to MMU table region which gives a 2MB
* window into physical memory. We especially don't want userland to be
* able to access this.
*/
metag_out32(0x900 | _PAGE_CACHEABLE | _PAGE_PRIV | _PAGE_WRITE |
_PAGE_PRESENT, phys0);
/* Set new MMU base address */
metag_out32(__pa(pgd) & MMCU_TBLPHYS1_ADDR_BITS, phys1);
}
#endif
static inline void switch_mmu(struct mm_struct *prev, struct mm_struct *next)
{
#ifdef CONFIG_METAG_META21_MMU
load_pgd(next->pgd, hard_processor_id());
#else
unsigned int i;
/* prev->context == prev->pgd in the case where we are initially
switching from the init task to the first process. */
if (prev->context.pgd_base != (unsigned long) prev->pgd) {
for (i = FIRST_USER_PGD_NR; i < USER_PTRS_PER_PGD; i++)
((pgd_t *) prev->context.pgd_base)[i] = prev->pgd[i];
} else
prev->pgd = (pgd_t *)mmu_get_base();
next->pgd = prev->pgd;
prev->pgd = (pgd_t *) prev->context.pgd_base;
for (i = FIRST_USER_PGD_NR; i < USER_PTRS_PER_PGD; i++)
next->pgd[i] = ((pgd_t *) next->context.pgd_base)[i];
flush_cache_all();
#endif
flush_tlb_all();
}
static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
struct task_struct *tsk)
{
if (prev != next)
switch_mmu(prev, next);
}
static inline void activate_mm(struct mm_struct *prev_mm,
struct mm_struct *next_mm)
{
switch_mmu(prev_mm, next_mm);
}
#define deactivate_mm(tsk, mm) do { } while (0)
#endif
#ifndef _METAG_PAGE_H
#define _METAG_PAGE_H
#include <linux/const.h>
#include <asm/metag_mem.h>
/* PAGE_SHIFT determines the page size */
#if defined(CONFIG_PAGE_SIZE_4K)
#define PAGE_SHIFT 12
#elif defined(CONFIG_PAGE_SIZE_8K)
#define PAGE_SHIFT 13
#elif defined(CONFIG_PAGE_SIZE_16K)
#define PAGE_SHIFT 14
#endif
#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1))
#if defined(CONFIG_HUGETLB_PAGE_SIZE_8K)
# define HPAGE_SHIFT 13
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_16K)
# define HPAGE_SHIFT 14
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_32K)
# define HPAGE_SHIFT 15
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
# define HPAGE_SHIFT 16
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_128K)
# define HPAGE_SHIFT 17
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
# define HPAGE_SHIFT 18
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
# define HPAGE_SHIFT 19
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1M)
# define HPAGE_SHIFT 20
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_2M)
# define HPAGE_SHIFT 21
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_4M)
# define HPAGE_SHIFT 22
#endif
#ifdef CONFIG_HUGETLB_PAGE
# define HPAGE_SIZE (1UL << HPAGE_SHIFT)
# define HPAGE_MASK (~(HPAGE_SIZE-1))
# define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT)
/*
* We define our own hugetlb_get_unmapped_area so we don't corrupt 2nd level
* page tables with normal pages in them.
*/
# define HUGEPT_SHIFT (22)
# define HUGEPT_ALIGN (1 << HUGEPT_SHIFT)
# define HUGEPT_MASK (HUGEPT_ALIGN - 1)
# define ALIGN_HUGEPT(x) ALIGN(x, HUGEPT_ALIGN)
# define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
#endif
#ifndef __ASSEMBLY__
/* On the Meta, we would like to know if the address (heap) we have is
* in local or global space.
*/
#define is_global_space(addr) ((addr) > 0x7fffffff)
#define is_local_space(addr) (!is_global_space(addr))
extern void clear_page(void *to);
extern void copy_page(void *to, void *from);
#define clear_user_page(page, vaddr, pg) clear_page(page)
#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
/*
* These are used to make use of C type-checking..
*/
typedef struct { unsigned long pte; } pte_t;
typedef struct { unsigned long pgd; } pgd_t;
typedef struct { unsigned long pgprot; } pgprot_t;
typedef struct page *pgtable_t;
#define pte_val(x) ((x).pte)
#define pgd_val(x) ((x).pgd)
#define pgprot_val(x) ((x).pgprot)
#define __pte(x) ((pte_t) { (x) })
#define __pgd(x) ((pgd_t) { (x) })
#define __pgprot(x) ((pgprot_t) { (x) })
/* The kernel must now ALWAYS live at either 0xC0000000 or 0x40000000 - that
* being either global or local space.
*/
#define PAGE_OFFSET (CONFIG_PAGE_OFFSET)
#if PAGE_OFFSET >= LINGLOBAL_BASE
#define META_MEMORY_BASE LINGLOBAL_BASE
#define META_MEMORY_LIMIT LINGLOBAL_LIMIT
#else
#define META_MEMORY_BASE LINLOCAL_BASE
#define META_MEMORY_LIMIT LINLOCAL_LIMIT
#endif
/* Offset between physical and virtual mapping of kernel memory. */
extern unsigned int meta_memoffset;
#define __pa(x) ((unsigned long)(((unsigned long)(x)) - meta_memoffset))
#define __va(x) ((void *)((unsigned long)(((unsigned long)(x)) + meta_memoffset)))
extern unsigned long pfn_base;
#define ARCH_PFN_OFFSET (pfn_base)
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
#define page_to_virt(page) __va(page_to_pfn(page) << PAGE_SHIFT)
#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
#ifdef CONFIG_FLATMEM
extern unsigned long max_pfn;
extern unsigned long min_low_pfn;
#define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_pfn)
#endif
#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
#include <asm-generic/memory_model.h>
#include <asm-generic/getorder.h>
#endif /* __ASSMEBLY__ */
#endif /* _METAG_PAGE_H */
#ifndef _METAG_PGALLOC_H
#define _METAG_PGALLOC_H
#include <linux/threads.h>
#include <linux/mm.h>
#define pmd_populate_kernel(mm, pmd, pte) \
set_pmd(pmd, __pmd(_PAGE_TABLE | __pa(pte)))
#define pmd_populate(mm, pmd, pte) \
set_pmd(pmd, __pmd(_PAGE_TABLE | page_to_phys(pte)))
#define pmd_pgtable(pmd) pmd_page(pmd)
/*
* Allocate and free page tables.
*/
#ifdef CONFIG_METAG_META21_MMU
static inline void pgd_ctor(pgd_t *pgd)
{
memcpy(pgd + USER_PTRS_PER_PGD,
swapper_pg_dir + USER_PTRS_PER_PGD,
(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
}
#else
#define pgd_ctor(x) do { } while (0)
#endif
static inline pgd_t *pgd_alloc(struct mm_struct *mm)
{
pgd_t *pgd = (pgd_t *)get_zeroed_page(GFP_KERNEL);
if (pgd)
pgd_ctor(pgd);
return pgd;
}
static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
{
free_page((unsigned long)pgd);
}
static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
unsigned long address)
{
pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT |
__GFP_ZERO);
return pte;
}
static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
unsigned long address)
{
struct page *pte;
pte = alloc_pages(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO, 0);
if (pte)
pgtable_page_ctor(pte);
return pte;
}
static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
{
free_page((unsigned long)pte);
}
static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
{
pgtable_page_dtor(pte);
__free_page(pte);
}
#define __pte_free_tlb(tlb, pte, addr) \
do { \
pgtable_page_dtor(pte); \
tlb_remove_page((tlb), (pte)); \
} while (0)
#define check_pgt_cache() do { } while (0)
#endif
/*
* Macros and functions to manipulate Meta page tables.
*/
#ifndef _METAG_PGTABLE_H
#define _METAG_PGTABLE_H
#include <asm-generic/pgtable-nopmd.h>
/* Invalid regions on Meta: 0x00000000-0x001FFFFF and 0xFFFF0000-0xFFFFFFFF */
#if PAGE_OFFSET >= LINGLOBAL_BASE
#define CONSISTENT_START 0xF7000000
#define CONSISTENT_END 0xF73FFFFF
#define VMALLOC_START 0xF8000000
#define VMALLOC_END 0xFFFEFFFF
#else
#define CONSISTENT_START 0x77000000
#define CONSISTENT_END 0x773FFFFF
#define VMALLOC_START 0x78000000
#define VMALLOC_END 0x7FFFFFFF
#endif
/*
* Definitions for MMU descriptors
*
* These are the hardware bits in the MMCU pte entries.
* Derived from the Meta toolkit headers.
*/
#define _PAGE_PRESENT MMCU_ENTRY_VAL_BIT
#define _PAGE_WRITE MMCU_ENTRY_WR_BIT
#define _PAGE_PRIV MMCU_ENTRY_PRIV_BIT
/* Write combine bit - this can cause writes to occur out of order */
#define _PAGE_WR_COMBINE MMCU_ENTRY_WRC_BIT
/* Sys coherent bit - this bit is never used by Linux */
#define _PAGE_SYS_COHERENT MMCU_ENTRY_SYS_BIT
#define _PAGE_ALWAYS_ZERO_1 0x020
#define _PAGE_CACHE_CTRL0 0x040
#define _PAGE_CACHE_CTRL1 0x080
#define _PAGE_ALWAYS_ZERO_2 0x100
#define _PAGE_ALWAYS_ZERO_3 0x200
#define _PAGE_ALWAYS_ZERO_4 0x400
#define _PAGE_ALWAYS_ZERO_5 0x800
/* These are software bits that we stuff into the gaps in the hardware
* pte entries that are not used. Note, these DO get stored in the actual
* hardware, but the hardware just does not use them.
*/
#define _PAGE_ACCESSED _PAGE_ALWAYS_ZERO_1
#define _PAGE_DIRTY _PAGE_ALWAYS_ZERO_2
#define _PAGE_FILE _PAGE_ALWAYS_ZERO_3
/* Pages owned, and protected by, the kernel. */
#define _PAGE_KERNEL _PAGE_PRIV
/* No cacheing of this page */
#define _PAGE_CACHE_WIN0 (MMCU_CWIN_UNCACHED << MMCU_ENTRY_CWIN_S)
/* burst cacheing - good for data streaming */
#define _PAGE_CACHE_WIN1 (MMCU_CWIN_BURST << MMCU_ENTRY_CWIN_S)
/* One cache way per thread */
#define _PAGE_CACHE_WIN2 (MMCU_CWIN_C1SET << MMCU_ENTRY_CWIN_S)
/* Full on cacheing */
#define _PAGE_CACHE_WIN3 (MMCU_CWIN_CACHED << MMCU_ENTRY_CWIN_S)
#define _PAGE_CACHEABLE (_PAGE_CACHE_WIN3 | _PAGE_WR_COMBINE)
/* which bits are used for cache control ... */
#define _PAGE_CACHE_MASK (_PAGE_CACHE_CTRL0 | _PAGE_CACHE_CTRL1 | \
_PAGE_WR_COMBINE)
/* This is a mask of the bits that pte_modify is allowed to change. */
#define _PAGE_CHG_MASK (PAGE_MASK)
#define _PAGE_SZ_SHIFT 1
#define _PAGE_SZ_4K (0x0)
#define _PAGE_SZ_8K (0x1 << _PAGE_SZ_SHIFT)
#define _PAGE_SZ_16K (0x2 << _PAGE_SZ_SHIFT)
#define _PAGE_SZ_32K (0x3 << _PAGE_SZ_SHIFT)
#define _PAGE_SZ_64K (0x4 << _PAGE_SZ_SHIFT)
#define _PAGE_SZ_128K (0x5 << _PAGE_SZ_SHIFT)
#define _PAGE_SZ_256K (0x6 << _PAGE_SZ_SHIFT)
#define _PAGE_SZ_512K (0x7 << _PAGE_SZ_SHIFT)
#define _PAGE_SZ_1M (0x8 << _PAGE_SZ_SHIFT)
#define _PAGE_SZ_2M (0x9 << _PAGE_SZ_SHIFT)
#define _PAGE_SZ_4M (0xa << _PAGE_SZ_SHIFT)
#define _PAGE_SZ_MASK (0xf << _PAGE_SZ_SHIFT)
#if defined(CONFIG_PAGE_SIZE_4K)
#define _PAGE_SZ (_PAGE_SZ_4K)
#elif defined(CONFIG_PAGE_SIZE_8K)
#define _PAGE_SZ (_PAGE_SZ_8K)
#elif defined(CONFIG_PAGE_SIZE_16K)
#define _PAGE_SZ (_PAGE_SZ_16K)
#endif
#define _PAGE_TABLE (_PAGE_SZ | _PAGE_PRESENT)
#if defined(CONFIG_HUGETLB_PAGE_SIZE_8K)
# define _PAGE_SZHUGE (_PAGE_SZ_8K)
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_16K)
# define _PAGE_SZHUGE (_PAGE_SZ_16K)
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_32K)
# define _PAGE_SZHUGE (_PAGE_SZ_32K)
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
# define _PAGE_SZHUGE (_PAGE_SZ_64K)
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_128K)
# define _PAGE_SZHUGE (_PAGE_SZ_128K)
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
# define _PAGE_SZHUGE (_PAGE_SZ_256K)
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
# define _PAGE_SZHUGE (_PAGE_SZ_512K)
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1M)
# define _PAGE_SZHUGE (_PAGE_SZ_1M)
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_2M)
# define _PAGE_SZHUGE (_PAGE_SZ_2M)
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_4M)
# define _PAGE_SZHUGE (_PAGE_SZ_4M)
#endif
/*
* The Linux memory management assumes a three-level page table setup. On
* Meta, we use that, but "fold" the mid level into the top-level page
* table.
*/
/* PGDIR_SHIFT determines the size of the area a second-level page table can
* map. This is always 4MB.
*/
#define PGDIR_SHIFT 22
#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
#define PGDIR_MASK (~(PGDIR_SIZE-1))
/*
* Entries per page directory level: we use a two-level, so
* we don't really have any PMD directory physically. First level tables
* always map 2Gb (local or global) at a granularity of 4MB, second-level
* tables map 4MB with a granularity between 4MB and 4kB (between 1 and
* 1024 entries).
*/
#define PTRS_PER_PTE (PGDIR_SIZE/PAGE_SIZE)
#define HPTRS_PER_PTE (PGDIR_SIZE/HPAGE_SIZE)
#define PTRS_PER_PGD 512
#define USER_PTRS_PER_PGD 256
#define FIRST_USER_ADDRESS META_MEMORY_BASE
#define FIRST_USER_PGD_NR pgd_index(FIRST_USER_ADDRESS)
#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
_PAGE_CACHEABLE)
#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \
_PAGE_ACCESSED | _PAGE_CACHEABLE)
#define PAGE_SHARED_C PAGE_SHARED
#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
_PAGE_CACHEABLE)
#define PAGE_COPY_C PAGE_COPY
#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
_PAGE_CACHEABLE)
#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
_PAGE_ACCESSED | _PAGE_WRITE | \
_PAGE_CACHEABLE | _PAGE_KERNEL)
#define __P000 PAGE_NONE
#define __P001 PAGE_READONLY
#define __P010 PAGE_COPY
#define __P011 PAGE_COPY
#define __P100 PAGE_READONLY
#define __P101 PAGE_READONLY
#define __P110 PAGE_COPY_C
#define __P111 PAGE_COPY_C
#define __S000 PAGE_NONE
#define __S001 PAGE_READONLY
#define __S010 PAGE_SHARED
#define __S011 PAGE_SHARED
#define __S100 PAGE_READONLY
#define __S101 PAGE_READONLY
#define __S110 PAGE_SHARED_C
#define __S111 PAGE_SHARED_C
#ifndef __ASSEMBLY__
#include <asm/page.h>
/* zero page used for uninitialized stuff */
extern unsigned long empty_zero_page;
#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
/* Certain architectures need to do special things when pte's
* within a page table are directly modified. Thus, the following
* hook is made available.
*/
#define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
#define pte_none(x) (!pte_val(x))
#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
#define pte_clear(mm, addr, xp) do { pte_val(*(xp)) = 0; } while (0)
#define pmd_none(x) (!pmd_val(x))
#define pmd_bad(x) ((pmd_val(x) & ~(PAGE_MASK | _PAGE_SZ_MASK)) \
!= (_PAGE_TABLE & ~_PAGE_SZ_MASK))
#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
#define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0)
#define pte_page(x) pfn_to_page(pte_pfn(x))
/*
* The following only work if pte_present() is true.
* Undefined behaviour if not..
*/
static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
static inline int pte_special(pte_t pte) { return 0; }
static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= (~_PAGE_WRITE); return pte; }
static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~