Commit f5c84cf5 authored by Paul Mundt's avatar Paul Mundt

sh: clkfwk: Tidy up on-chip clock registration and rate propagation.

This tidies up the set_rate hack that the on-chip clocks were abusing to
trigger rate propagation, which is now handled generically.

Additionally, now that CLK_ENABLE_ON_INIT is wired up where it needs to
be for these clocks, the clk_enable() can go away. In some cases this was
bumping up the refcount higher than it should have been.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent aa87aa34
......@@ -127,7 +127,7 @@ static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id)
frqcr3 |= tmp << 6;
ctrl_outl(frqcr3, CPG2_FRQCR3);
return clk->parent->rate / frqcr3_divisors[tmp];
clk->rate = clk->parent->rate / frqcr3_divisors[tmp];
return 0;
}
......@@ -153,28 +153,17 @@ static struct clk *sh4202_onchip_clocks[] = {
static int __init sh4202_clk_init(void)
{
struct clk *clk = clk_get(NULL, "master_clk");
int i;
int i, ret = 0;
for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) {
struct clk *clkp = sh4202_onchip_clocks[i];
clkp->parent = clk;
clk_register(clkp);
clk_enable(clkp);
ret |= clk_register(clkp);
}
/*
* Now that we have the rest of the clocks registered, we need to
* force the parent clock to propagate so that these clocks will
* automatically figure out their rate. We cheat by handing the
* parent clock its current rate and forcing child propagation.
*/
clk_set_rate(clk, clk_get_rate(clk));
clk_put(clk);
return 0;
return ret;
}
arch_initcall(sh4202_clk_init);
......@@ -93,28 +93,17 @@ static struct clk *sh7763_onchip_clocks[] = {
static int __init sh7763_clk_init(void)
{
struct clk *clk = clk_get(NULL, "master_clk");
int i;
int i, ret = 0;
for (i = 0; i < ARRAY_SIZE(sh7763_onchip_clocks); i++) {
struct clk *clkp = sh7763_onchip_clocks[i];
clkp->parent = clk;
clk_register(clkp);
clk_enable(clkp);
ret |= clk_register(clkp);
}
/*
* Now that we have the rest of the clocks registered, we need to
* force the parent clock to propagate so that these clocks will
* automatically figure out their rate. We cheat by handing the
* parent clock its current rate and forcing child propagation.
*/
clk_set_rate(clk, clk_get_rate(clk));
clk_put(clk);
return 0;
return ret;
}
arch_initcall(sh7763_clk_init);
......@@ -99,28 +99,17 @@ static struct clk *sh7780_onchip_clocks[] = {
static int __init sh7780_clk_init(void)
{
struct clk *clk = clk_get(NULL, "master_clk");
int i;
int i, ret = 0;
for (i = 0; i < ARRAY_SIZE(sh7780_onchip_clocks); i++) {
struct clk *clkp = sh7780_onchip_clocks[i];
clkp->parent = clk;
clk_register(clkp);
clk_enable(clkp);
ret |= clk_register(clkp);
}
/*
* Now that we have the rest of the clocks registered, we need to
* force the parent clock to propagate so that these clocks will
* automatically figure out their rate. We cheat by handing the
* parent clock its current rate and forcing child propagation.
*/
clk_set_rate(clk, clk_get_rate(clk));
clk_put(clk);
return 0;
return ret;
}
arch_initcall(sh7780_clk_init);
......@@ -137,26 +137,17 @@ static struct clk *sh7785_onchip_clocks[] = {
static int __init sh7785_clk_init(void)
{
struct clk *clk = clk_get(NULL, "master_clk");
int i;
int i, ret = 0;
for (i = 0; i < ARRAY_SIZE(sh7785_onchip_clocks); i++) {
struct clk *clkp = sh7785_onchip_clocks[i];
clkp->parent = clk;
clk_register(clkp);
clk_enable(clkp);
ret |= clk_register(clkp);
}
/*
* Now that we have the rest of the clocks registered, we need to
* force the parent clock to propagate so that these clocks will
* automatically figure out their rate. We cheat by handing the
* parent clock its current rate and forcing child propagation.
*/
clk_set_rate(clk, clk_get_rate(clk));
clk_put(clk);
return 0;
return ret;
}
arch_initcall(sh7785_clk_init);
......@@ -123,26 +123,17 @@ static struct clk *sh7786_onchip_clocks[] = {
static int __init sh7786_clk_init(void)
{
struct clk *clk = clk_get(NULL, "master_clk");
int i;
int i, ret = 0;
for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) {
struct clk *clkp = sh7786_onchip_clocks[i];
clkp->parent = clk;
clk_register(clkp);
clk_enable(clkp);
ret |= clk_register(clkp);
}
/*
* Now that we have the rest of the clocks registered, we need to
* force the parent clock to propagate so that these clocks will
* automatically figure out their rate. We cheat by handing the
* parent clock its current rate and forcing child propagation.
*/
clk_set_rate(clk, clk_get_rate(clk));
clk_put(clk);
return 0;
return ret;
}
arch_initcall(sh7786_clk_init);
......@@ -110,26 +110,17 @@ static struct clk *shx3_onchip_clocks[] = {
static int __init shx3_clk_init(void)
{
struct clk *clk = clk_get(NULL, "master_clk");
int i;
int i, ret = 0;
for (i = 0; i < ARRAY_SIZE(shx3_onchip_clocks); i++) {
struct clk *clkp = shx3_onchip_clocks[i];
clkp->parent = clk;
clk_register(clkp);
clk_enable(clkp);
ret |= clk_register(clkp);
}
/*
* Now that we have the rest of the clocks registered, we need to
* force the parent clock to propagate so that these clocks will
* automatically figure out their rate. We cheat by handing the
* parent clock its current rate and forcing child propagation.
*/
clk_set_rate(clk, clk_get_rate(clk));
clk_put(clk);
return 0;
return ret;
}
arch_initcall(shx3_clk_init);
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