Commit f4117ac9 authored by Russell King's avatar Russell King
Browse files

ARM: P2V: separate PHYS_OFFSET from platform definitions



This uncouple PHYS_OFFSET from the platform definitions, thereby
facilitating run-time computation of the physical memory offset.
Acked-by: default avatarNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: default avatarViresh Kumar <viresh.kumar@st.com>
Acked-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: default avatarMagnus Damm <damm@opensource.se>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Acked-by: default avatarJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: default avatarWan ZongShun <mcuos.com@gmail.com>
Acked-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Acked-by: default avatarEric Miao <eric.y.miao@gmail.com>
Acked-by: default avatarJiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 6fc31d54
......@@ -24,6 +24,8 @@
*/
#define UL(x) _AC(x, UL)
#define PHYS_OFFSET PLAT_PHYS_OFFSET
#ifdef CONFIG_MMU
/*
......
......@@ -15,7 +15,7 @@
#include <linux/string.h> /* memcpy */
#include <asm/cputype.h>
#include <asm/mach/map.h>
#include <mach/memory.h>
#include <asm/memory.h>
#include "tcm.h"
static struct gen_pool *tcm_pool;
......
......@@ -12,6 +12,6 @@
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0xf0000000)
#define PLAT_PHYS_OFFSET UL(0xf0000000)
#endif /* __ASM_ARCH_MEMORY_H */
......@@ -23,6 +23,6 @@
#include <mach/hardware.h>
#define PHYS_OFFSET (AT91_SDRAM_BASE)
#define PLAT_PHYS_OFFSET (AT91_SDRAM_BASE)
#endif
......@@ -31,7 +31,7 @@
* *_SIZE is the size of the region
* *_BASE is the virtual address
*/
#define RAM_START PHYS_OFFSET
#define RAM_START PLAT_PHYS_OFFSET
#define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED)
#define RAM_BASE PAGE_OFFSET
......
......@@ -23,7 +23,7 @@
* files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
*/
#define PHYS_OFFSET CFG_GLOBAL_RAM_BASE
#define PLAT_PHYS_OFFSET CFG_GLOBAL_RAM_BASE
/*
* Maximum DMA memory allowed is 14M
......
......@@ -23,7 +23,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0xc0000000)
#define PLAT_PHYS_OFFSET UL(0xc0000000)
#if !defined(CONFIG_ARCH_CDB89712) && !defined (CONFIG_ARCH_AUTCPU12)
......
......@@ -13,7 +13,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#define __phys_to_bus(x) ((x) + PHYS_OFFSET)
#define __bus_to_phys(x) ((x) - PHYS_OFFSET)
......
......@@ -26,9 +26,9 @@
#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
#error Cannot enable DaVinci and DA8XX platforms concurrently
#elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
#define PHYS_OFFSET DA8XX_DDR_BASE
#define PLAT_PHYS_OFFSET DA8XX_DDR_BASE
#else
#define PHYS_OFFSET DAVINCI_DDR_BASE
#define PLAT_PHYS_OFFSET DAVINCI_DDR_BASE
#endif
#define DDR2_SDRCR_OFFSET 0xc
......
......@@ -5,6 +5,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -19,7 +19,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
/*
* Cache flushing area - SRAM
......
......@@ -6,15 +6,15 @@
#define __ASM_ARCH_MEMORY_H
#if defined(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET)
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xc0000000)
#define PLAT_PHYS_OFFSET UL(0xc0000000)
#elif defined(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xd0000000)
#define PLAT_PHYS_OFFSET UL(0xd0000000)
#elif defined(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xe0000000)
#define PLAT_PHYS_OFFSET UL(0xe0000000)
#elif defined(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xf0000000)
#define PLAT_PHYS_OFFSET UL(0xf0000000)
#else
#error "Kconfig bug: No EP93xx PHYS_OFFSET set"
#endif
......
......@@ -62,7 +62,7 @@ extern unsigned long __bus_to_pfn(unsigned long);
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#define FLUSH_BASE_PHYS 0x50000000
......
......@@ -11,9 +11,9 @@
#define __MACH_MEMORY_H
#ifdef CONFIG_GEMINI_MEM_SWAP
# define PHYS_OFFSET UL(0x00000000)
# define PLAT_PHYS_OFFSET UL(0x00000000)
#else
# define PHYS_OFFSET UL(0x10000000)
# define PLAT_PHYS_OFFSET UL(0x10000000)
#endif
#endif /* __MACH_MEMORY_H */
......@@ -7,7 +7,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x40000000)
#define PLAT_PHYS_OFFSET UL(0x40000000)
/*
* This is the maximum DMA address that can be DMAd to.
* There should not be more than (0xd0000000 - 0xc0000000)
......
......@@ -23,7 +23,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#define BUS_OFFSET UL(0x80000000)
#define __virt_to_bus(x) ((x) - PAGE_OFFSET + BUS_OFFSET)
......
......@@ -6,7 +6,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#ifndef __ASSEMBLY__
......
......@@ -8,6 +8,6 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0xa0000000)
#define PLAT_PHYS_OFFSET UL(0xa0000000)
#endif
......@@ -8,6 +8,6 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -13,7 +13,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#include <mach/ixp2000-regs.h>
......
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