Commit f1cd8de2 authored by David S. Miller's avatar David S. Miller
Browse files

[SPARC64]: Move pci_ops into pci_pbm_info.


Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 96a496fd
......@@ -743,7 +743,6 @@ int pci_host_bridge_write_pci_cfg(struct pci_bus *bus_dev,
struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm)
{
struct pci_controller_info *p = pbm->parent;
struct device_node *node = pbm->prom_node;
struct pci_dev *host_pdev;
struct pci_bus *bus;
......@@ -751,7 +750,7 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm)
printk("PCI: Scanning PBM %s\n", node->full_name);
/* XXX parent device? XXX */
bus = pci_create_bus(NULL, pbm->pci_first_busno, p->pci_ops, pbm);
bus = pci_create_bus(NULL, pbm->pci_first_busno, pbm->pci_ops, pbm);
if (!bus) {
printk(KERN_ERR "Failed to create bus for %s\n",
node->full_name);
......
......@@ -315,6 +315,7 @@ static void pci_fire_pbm_init(struct pci_controller_info *p,
pci_pbm_root = pbm;
pbm->scan_bus = pci_fire_scan_bus;
pbm->pci_ops = &pci_fire_ops;
pbm->portid = portid;
pbm->parent = p;
......@@ -375,7 +376,6 @@ void fire_pci_init(struct device_node *dp, const char *model_name)
p->index = pci_num_controllers++;
/* XXX MSI support XXX */
p->pci_ops = &pci_fire_ops;
/* Like PSYCHO and SCHIZO we have a 2GB aligned area
* for memory space.
......
......@@ -1087,6 +1087,7 @@ static void psycho_pbm_init(struct pci_controller_info *p,
pci_pbm_root = pbm;
pbm->scan_bus = psycho_scan_bus;
pbm->pci_ops = &psycho_ops;
pbm->chip_type = PBM_CHIP_TYPE_PSYCHO;
pbm->chip_version = 0;
......@@ -1155,7 +1156,6 @@ void psycho_init(struct device_node *dp, char *model_name)
p->pbm_A.portid = upa_portid;
p->pbm_B.portid = upa_portid;
p->index = pci_num_controllers++;
p->pci_ops = &psycho_ops;
prop = of_find_property(dp, "reg", NULL);
pr_regs = prop->value;
......
......@@ -1004,6 +1004,7 @@ static void sabre_pbm_init(struct pci_controller_info *p, struct device_node *dp
printk("%s: SABRE PCI Bus Module\n", pbm->name);
pbm->scan_bus = sabre_scan_bus;
pbm->pci_ops = &sabre_ops;
pbm->chip_type = PBM_CHIP_TYPE_SABRE;
pbm->parent = p;
......@@ -1062,7 +1063,6 @@ void sabre_init(struct device_node *dp, char *model_name)
p->pbm_A.portid = upa_portid;
p->index = pci_num_controllers++;
p->pci_ops = &sabre_ops;
/*
* Map in SABRE register set and report the presence of this SABRE.
......
......@@ -1462,6 +1462,7 @@ static void schizo_pbm_init(struct pci_controller_info *p,
pci_pbm_root = pbm;
pbm->scan_bus = schizo_scan_bus;
pbm->pci_ops = &schizo_ops;
pbm->portid = portid;
pbm->parent = p;
......@@ -1536,7 +1537,6 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ
p->pbm_B.iommu = iommu;
p->index = pci_num_controllers++;
p->pci_ops = &schizo_ops;
/* Like PSYCHO we have a 2GB aligned area for memory space. */
pci_memspace_mask = 0x7fffffffUL;
......
......@@ -1236,6 +1236,7 @@ static void pci_sun4v_pbm_init(struct pci_controller_info *p, struct device_node
pci_pbm_root = pbm;
pbm->scan_bus = pci_sun4v_scan_bus;
pbm->pci_ops = &pci_sun4v_ops;
pbm->parent = p;
pbm->prom_node = dp;
......@@ -1306,7 +1307,6 @@ void sun4v_pci_init(struct device_node *dp, char *model_name)
p->setup_msi_irq = pci_sun4v_setup_msi_irq;
p->teardown_msi_irq = pci_sun4v_teardown_msi_irq;
#endif
p->pci_ops = &pci_sun4v_ops;
/* Like PSYCHO and SCHIZO we have a 2GB aligned area
* for memory space.
......
......@@ -116,6 +116,7 @@ struct pci_pbm_info {
unsigned int pci_last_busno;
struct pci_bus *pci_bus;
void (*scan_bus)(struct pci_pbm_info *);
struct pci_ops *pci_ops;
};
struct pci_controller_info {
......@@ -134,9 +135,6 @@ struct pci_controller_info {
struct msi_desc *entry);
void (*teardown_msi_irq)(unsigned int virt_irq, struct pci_dev *pdev);
#endif
/* Now things for the actual PCI bus probes. */
struct pci_ops *pci_ops;
};
#endif /* !(__SPARC64_PBM_H) */
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