Commit f1b35b83 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'for-linus' of git://github.com/gxt/linux

Pull UniCore32 bug fixes from Guan Xuetao:
 "This includes bugfixes to make unicore32 successfully build under
  defconfig, and some changes for allmodconfig (though not finished)"

* tag 'for-linus' of git://github.com/gxt/linux:
  unicore32: Remove ARCH_HAS_CPUFREQ config option
  UniCore32: Change git tree location information in MAINTAINERS
  arch: unicore32: ksyms: export '__cpuc_coherent_kern_range' to avoid compiling failure
  arch: unicore32: ksyms: export 'pm_power_off' to avoid compiling failure.
  arch: unicore32: ksyms: export additional find_first_*() to avoid compiling failure
  arch:unicore32:mm: add devmem_is_allowed() to support STRICT_DEVMEM
  unicore32: include: asm: add missing ')' for PAGE_* macros in pgtable.h
  arch/unicore32/kernel/setup.c: add generic 'screen_info' to avoid compiling failure
  drivers: scsi: mvsas: fix compiling issue by adding 'MVS_' for "enum pci_interrupt_cause"
  arch: unicore32: kernel: ksyms: remove 'bswapsi2' and 'muldi3' to avoid compiling failure
  arch/unicore32/kernel/ksyms.c: remove 2 export symbols to avoid compiling failure
  drivers/rtc/rtc-puv3.c: remove "&dev->" for typo issue MIME-Version: 1.0
  drivers/rtc/rtc-puv3.c: use dev_dbg() instead of dev_debug() for typo issue
  arch/unicore32/include/asm/io.h: add readl_relaxed() generic definition
  arch/unicore32/include/asm/ptrace.h: add generic definition for profile_pc()
  arch/unicore32/mm/alignment.c: include "asm/pgtable.h" to avoid compiling error
  arch/unicore32/kernel/clock.c: add readl() and writel() for 'PM_' macros
  arch/unicore32/kernel/module.c: use __vmalloc_node_range() instead of __vmalloc_area()
  arch/unicore32/kernel/ksyms.c: remove several undefined exported symbols
parents 60761c10 d670878e
......@@ -6960,7 +6960,7 @@ PKUNITY SOC DRIVERS
M: Guan Xuetao <gxt@mprc.pku.edu.cn>
W: http://mprc.pku.edu.cn/~guanxuetao/linux
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git
T: git git://github.com/gxt/linux.git
F: drivers/input/serio/i8042-unicore32io.h
F: drivers/i2c/busses/i2c-puv3.c
F: drivers/video/fb-puv3.c
......@@ -9277,7 +9277,7 @@ UNICORE32 ARCHITECTURE:
M: Guan Xuetao <gxt@mprc.pku.edu.cn>
W: http://mprc.pku.edu.cn/~guanxuetao/linux
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git
T: git git://github.com/gxt/linux.git
F: arch/unicore32/
UNIFDEF
......
......@@ -51,9 +51,6 @@ config ARCH_HAS_ILOG2_U32
config ARCH_HAS_ILOG2_U64
bool
config ARCH_HAS_CPUFREQ
bool
config GENERIC_HWEIGHT
def_bool y
......@@ -87,7 +84,6 @@ config ARCH_PUV3
select GENERIC_CLOCKEVENTS
select HAVE_CLK
select ARCH_REQUIRE_GPIOLIB
select ARCH_HAS_CPUFREQ
# CONFIGs for ARCH_PUV3
......@@ -198,9 +194,7 @@ menu "Power management options"
source "kernel/power/Kconfig"
if ARCH_HAS_CPUFREQ
source "drivers/cpufreq/Kconfig"
endif
config ARCH_SUSPEND_POSSIBLE
def_bool y if !ARCH_FPGA
......
......@@ -39,10 +39,37 @@ extern void __uc32_iounmap(volatile void __iomem *addr);
#define ioremap_nocache(cookie, size) __uc32_ioremap(cookie, size)
#define iounmap(cookie) __uc32_iounmap(cookie)
#define readb_relaxed readb
#define readw_relaxed readw
#define readl_relaxed readl
#define HAVE_ARCH_PIO_SIZE
#define PIO_OFFSET (unsigned int)(PCI_IOBASE)
#define PIO_MASK (unsigned int)(IO_SPACE_LIMIT)
#define PIO_RESERVED (PIO_OFFSET + PIO_MASK + 1)
#ifdef CONFIG_STRICT_DEVMEM
#include <linux/ioport.h>
#include <linux/mm.h>
/*
* devmem_is_allowed() checks to see if /dev/mem access to a certain
* address is valid. The argument is a physical page number.
* We mimic x86 here by disallowing access to system RAM as well as
* device-exclusive MMIO regions. This effectively disable read()/write()
* on /dev/mem.
*/
static inline int devmem_is_allowed(unsigned long pfn)
{
if (iomem_is_exclusive(pfn << PAGE_SHIFT))
return 0;
if (!page_is_ram(pfn))
return 1;
return 0;
}
#endif /* CONFIG_STRICT_DEVMEM */
#endif /* __KERNEL__ */
#endif /* __UNICORE_IO_H__ */
......@@ -87,16 +87,16 @@ extern pgprot_t pgprot_kernel;
#define PAGE_NONE pgprot_user
#define PAGE_SHARED __pgprot(pgprot_val(pgprot_user | PTE_READ \
| PTE_WRITE)
| PTE_WRITE))
#define PAGE_SHARED_EXEC __pgprot(pgprot_val(pgprot_user | PTE_READ \
| PTE_WRITE \
| PTE_EXEC)
| PTE_EXEC))
#define PAGE_COPY __pgprot(pgprot_val(pgprot_user | PTE_READ)
#define PAGE_COPY_EXEC __pgprot(pgprot_val(pgprot_user | PTE_READ \
| PTE_EXEC)
#define PAGE_READONLY __pgprot(pgprot_val(pgprot_user | PTE_READ)
| PTE_EXEC))
#define PAGE_READONLY __pgprot(pgprot_val(pgprot_user | PTE_READ))
#define PAGE_READONLY_EXEC __pgprot(pgprot_val(pgprot_user | PTE_READ \
| PTE_EXEC)
| PTE_EXEC))
#define PAGE_KERNEL pgprot_kernel
#define PAGE_KERNEL_EXEC __pgprot(pgprot_val(pgprot_kernel | PTE_EXEC))
......
......@@ -55,6 +55,7 @@ static inline int valid_user_regs(struct pt_regs *regs)
#define instruction_pointer(regs) ((regs)->UCreg_pc)
#define user_stack_pointer(regs) ((regs)->UCreg_sp)
#define profile_pc(regs) instruction_pointer(regs)
#endif /* __ASSEMBLY__ */
#endif
......@@ -179,7 +179,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
}
#ifdef CONFIG_CPU_FREQ
if (clk == &clk_mclk_clk) {
u32 pll_rate, divstatus = PM_DIVSTATUS;
u32 pll_rate, divstatus = readl(PM_DIVSTATUS);
int ret, i;
/* lookup mclk_clk_table */
......@@ -201,10 +201,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
/ (((divstatus & 0x0000f000) >> 12) + 1);
/* set pll sys cfg reg. */
PM_PLLSYSCFG = pll_rate;
writel(pll_rate, PM_PLLSYSCFG);
PM_PMCR = PM_PMCR_CFBSYS;
while ((PM_PLLDFCDONE & PM_PLLDFCDONE_SYSDFC)
writel(PM_PMCR_CFBSYS, PM_PMCR);
while ((readl(PM_PLLDFCDONE) & PM_PLLDFCDONE_SYSDFC)
!= PM_PLLDFCDONE_SYSDFC)
udelay(100);
/* about 1ms */
......
......@@ -23,41 +23,15 @@
#include "ksyms.h"
EXPORT_SYMBOL(find_first_bit);
EXPORT_SYMBOL(find_first_zero_bit);
EXPORT_SYMBOL(find_next_zero_bit);
EXPORT_SYMBOL(find_next_bit);
EXPORT_SYMBOL(__backtrace);
/* platform dependent support */
EXPORT_SYMBOL(__udelay);
EXPORT_SYMBOL(__const_udelay);
/* networking */
EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(csum_partial_copy_from_user);
EXPORT_SYMBOL(csum_partial_copy_nocheck);
EXPORT_SYMBOL(__csum_ipv6_magic);
/* io */
#ifndef __raw_readsb
EXPORT_SYMBOL(__raw_readsb);
#endif
#ifndef __raw_readsw
EXPORT_SYMBOL(__raw_readsw);
#endif
#ifndef __raw_readsl
EXPORT_SYMBOL(__raw_readsl);
#endif
#ifndef __raw_writesb
EXPORT_SYMBOL(__raw_writesb);
#endif
#ifndef __raw_writesw
EXPORT_SYMBOL(__raw_writesw);
#endif
#ifndef __raw_writesl
EXPORT_SYMBOL(__raw_writesl);
#endif
/* string / mem functions */
EXPORT_SYMBOL(strchr);
EXPORT_SYMBOL(strrchr);
......@@ -76,23 +50,12 @@ EXPORT_SYMBOL(__copy_from_user);
EXPORT_SYMBOL(__copy_to_user);
EXPORT_SYMBOL(__clear_user);
EXPORT_SYMBOL(__get_user_1);
EXPORT_SYMBOL(__get_user_2);
EXPORT_SYMBOL(__get_user_4);
EXPORT_SYMBOL(__put_user_1);
EXPORT_SYMBOL(__put_user_2);
EXPORT_SYMBOL(__put_user_4);
EXPORT_SYMBOL(__put_user_8);
EXPORT_SYMBOL(__ashldi3);
EXPORT_SYMBOL(__ashrdi3);
EXPORT_SYMBOL(__divsi3);
EXPORT_SYMBOL(__lshrdi3);
EXPORT_SYMBOL(__modsi3);
EXPORT_SYMBOL(__muldi3);
EXPORT_SYMBOL(__ucmpdi2);
EXPORT_SYMBOL(__udivsi3);
EXPORT_SYMBOL(__umodsi3);
EXPORT_SYMBOL(__bswapsi2);
......@@ -8,8 +8,6 @@ extern void __ashrdi3(void);
extern void __divsi3(void);
extern void __lshrdi3(void);
extern void __modsi3(void);
extern void __muldi3(void);
extern void __ucmpdi2(void);
extern void __udivsi3(void);
extern void __umodsi3(void);
extern void __bswapsi2(void);
......@@ -24,14 +24,9 @@
void *module_alloc(unsigned long size)
{
struct vm_struct *area;
size = PAGE_ALIGN(size);
area = __get_vm_area(size, VM_ALLOC, MODULES_VADDR, MODULES_END);
if (!area)
return NULL;
return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL_EXEC);
return __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,
GFP_KERNEL, PAGE_KERNEL_EXEC, NUMA_NO_NODE,
__builtin_return_address(0));
}
int
......
......@@ -60,6 +60,7 @@ void machine_halt(void)
* Function pointers to optional machine specific functions
*/
void (*pm_power_off)(void) = NULL;
EXPORT_SYMBOL(pm_power_off);
void machine_power_off(void)
{
......
......@@ -53,6 +53,10 @@ struct stack {
static struct stack stacks[NR_CPUS];
#ifdef CONFIG_VGA_CONSOLE
struct screen_info screen_info;
#endif
char elf_platform[ELF_PLATFORM_SIZE];
EXPORT_SYMBOL(elf_platform);
......
......@@ -21,6 +21,7 @@
#include <linux/sched.h>
#include <linux/uaccess.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
#include <asm/unaligned.h>
......
......@@ -19,5 +19,7 @@
EXPORT_SYMBOL(cpu_dcache_clean_area);
EXPORT_SYMBOL(cpu_set_pte);
EXPORT_SYMBOL(__cpuc_coherent_kern_range);
EXPORT_SYMBOL(__cpuc_dma_flush_range);
EXPORT_SYMBOL(__cpuc_dma_clean_range);
......@@ -71,7 +71,7 @@ static int puv3_rtc_setpie(struct device *dev, int enabled)
{
unsigned int tmp;
dev_debug(dev, "%s: pie=%d\n", __func__, enabled);
dev_dbg(dev, "%s: pie=%d\n", __func__, enabled);
spin_lock_irq(&puv3_rtc_pie_lock);
tmp = readl(RTC_RTSR) & ~RTC_RTSR_HZE;
......@@ -140,7 +140,7 @@ static int puv3_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
rtc_tm_to_time(tm, &rtcalarm_count);
writel(rtcalarm_count, RTC_RTAR);
puv3_rtc_setaie(&dev->dev, alrm->enabled);
puv3_rtc_setaie(dev, alrm->enabled);
if (alrm->enabled)
enable_irq_wake(puv3_rtc_alarmno);
......
......@@ -564,7 +564,7 @@ static void mvs_94xx_interrupt_enable(struct mvs_info *mvi)
u32 tmp;
tmp = mr32(MVS_GBL_CTL);
tmp |= (IRQ_SAS_A | IRQ_SAS_B);
tmp |= (MVS_IRQ_SAS_A | MVS_IRQ_SAS_B);
mw32(MVS_GBL_INT_STAT, tmp);
writel(tmp, regs + 0x0C);
writel(tmp, regs + 0x10);
......@@ -580,7 +580,7 @@ static void mvs_94xx_interrupt_disable(struct mvs_info *mvi)
tmp = mr32(MVS_GBL_CTL);
tmp &= ~(IRQ_SAS_A | IRQ_SAS_B);
tmp &= ~(MVS_IRQ_SAS_A | MVS_IRQ_SAS_B);
mw32(MVS_GBL_INT_STAT, tmp);
writel(tmp, regs + 0x0C);
writel(tmp, regs + 0x10);
......@@ -596,7 +596,7 @@ static u32 mvs_94xx_isr_status(struct mvs_info *mvi, int irq)
if (!(mvi->flags & MVF_FLAG_SOC)) {
stat = mr32(MVS_GBL_INT_STAT);
if (!(stat & (IRQ_SAS_A | IRQ_SAS_B)))
if (!(stat & (MVS_IRQ_SAS_A | MVS_IRQ_SAS_B)))
return 0;
}
return stat;
......@@ -606,8 +606,8 @@ static irqreturn_t mvs_94xx_isr(struct mvs_info *mvi, int irq, u32 stat)
{
void __iomem *regs = mvi->regs;
if (((stat & IRQ_SAS_A) && mvi->id == 0) ||
((stat & IRQ_SAS_B) && mvi->id == 1)) {
if (((stat & MVS_IRQ_SAS_A) && mvi->id == 0) ||
((stat & MVS_IRQ_SAS_B) && mvi->id == 1)) {
mw32_f(MVS_INT_STAT, CINT_DONE);
spin_lock(&mvi->lock);
......
......@@ -150,35 +150,35 @@ enum chip_register_bits {
enum pci_interrupt_cause {
/* MAIN_IRQ_CAUSE (R10200) Bits*/
IRQ_COM_IN_I2O_IOP0 = (1 << 0),
IRQ_COM_IN_I2O_IOP1 = (1 << 1),
IRQ_COM_IN_I2O_IOP2 = (1 << 2),
IRQ_COM_IN_I2O_IOP3 = (1 << 3),
IRQ_COM_OUT_I2O_HOS0 = (1 << 4),
IRQ_COM_OUT_I2O_HOS1 = (1 << 5),
IRQ_COM_OUT_I2O_HOS2 = (1 << 6),
IRQ_COM_OUT_I2O_HOS3 = (1 << 7),
IRQ_PCIF_TO_CPU_DRBL0 = (1 << 8),
IRQ_PCIF_TO_CPU_DRBL1 = (1 << 9),
IRQ_PCIF_TO_CPU_DRBL2 = (1 << 10),
IRQ_PCIF_TO_CPU_DRBL3 = (1 << 11),
IRQ_PCIF_DRBL0 = (1 << 12),
IRQ_PCIF_DRBL1 = (1 << 13),
IRQ_PCIF_DRBL2 = (1 << 14),
IRQ_PCIF_DRBL3 = (1 << 15),
IRQ_XOR_A = (1 << 16),
IRQ_XOR_B = (1 << 17),
IRQ_SAS_A = (1 << 18),
IRQ_SAS_B = (1 << 19),
IRQ_CPU_CNTRL = (1 << 20),
IRQ_GPIO = (1 << 21),
IRQ_UART = (1 << 22),
IRQ_SPI = (1 << 23),
IRQ_I2C = (1 << 24),
IRQ_SGPIO = (1 << 25),
IRQ_COM_ERR = (1 << 29),
IRQ_I2O_ERR = (1 << 30),
IRQ_PCIE_ERR = (1 << 31),
MVS_IRQ_COM_IN_I2O_IOP0 = (1 << 0),
MVS_IRQ_COM_IN_I2O_IOP1 = (1 << 1),
MVS_IRQ_COM_IN_I2O_IOP2 = (1 << 2),
MVS_IRQ_COM_IN_I2O_IOP3 = (1 << 3),
MVS_IRQ_COM_OUT_I2O_HOS0 = (1 << 4),
MVS_IRQ_COM_OUT_I2O_HOS1 = (1 << 5),
MVS_IRQ_COM_OUT_I2O_HOS2 = (1 << 6),
MVS_IRQ_COM_OUT_I2O_HOS3 = (1 << 7),
MVS_IRQ_PCIF_TO_CPU_DRBL0 = (1 << 8),
MVS_IRQ_PCIF_TO_CPU_DRBL1 = (1 << 9),
MVS_IRQ_PCIF_TO_CPU_DRBL2 = (1 << 10),
MVS_IRQ_PCIF_TO_CPU_DRBL3 = (1 << 11),
MVS_IRQ_PCIF_DRBL0 = (1 << 12),
MVS_IRQ_PCIF_DRBL1 = (1 << 13),
MVS_IRQ_PCIF_DRBL2 = (1 << 14),
MVS_IRQ_PCIF_DRBL3 = (1 << 15),
MVS_IRQ_XOR_A = (1 << 16),
MVS_IRQ_XOR_B = (1 << 17),
MVS_IRQ_SAS_A = (1 << 18),
MVS_IRQ_SAS_B = (1 << 19),
MVS_IRQ_CPU_CNTRL = (1 << 20),
MVS_IRQ_GPIO = (1 << 21),
MVS_IRQ_UART = (1 << 22),
MVS_IRQ_SPI = (1 << 23),
MVS_IRQ_I2C = (1 << 24),
MVS_IRQ_SGPIO = (1 << 25),
MVS_IRQ_COM_ERR = (1 << 29),
MVS_IRQ_I2O_ERR = (1 << 30),
MVS_IRQ_PCIE_ERR = (1 << 31),
};
union reg_phy_cfg {
......
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