Commit edcb4d3c authored by Vince Weaver's avatar Vince Weaver Committed by Ingo Molnar

perf/ARM: Use common PMU interrupt disabled code

Make the ARM perf code use the new common PMU interrupt disabled code.

This allows perf to work on ARM machines without a working PMU
interrupt (for example, raspberry pi).
Acked-by: default avatarWill Deacon <>
Signed-off-by: default avatarVince Weaver <>
[peterz: applied changes suggested by Will]
Signed-off-by: default avatarPeter Zijlstra <>
Cc: Arnaldo Carvalho de Melo <>
Cc: Grant Likely <>
Cc: Linus Torvalds <>
Cc: Paul Mackerras <>
Cc: Rob Herring <>
Cc: Russell King <>
Cc: Will Deacon <>
[ Small readability tweaks to the code. ]
Signed-off-by: default avatarIngo Molnar <>
Signed-off-by: default avatarIngo Molnar <>
parent 53b25335
......@@ -410,7 +410,7 @@ __hw_perf_event_init(struct perf_event *event)
hwc->config_base |= (unsigned long)mapping;
if (!hwc->sample_period) {
if (!is_sampling_event(event)) {
* For non-sampling runs, limit the sample_period to half
* of the counter width. That way, the new counter value
......@@ -126,8 +126,8 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
irqs = min(pmu_device->num_resources, num_possible_cpus());
if (irqs < 1) {
pr_err("no irqs for PMUs defined\n");
return -ENODEV;
printk_once("perf/ARM: No irqs for PMU defined, sampling events not supported\n");
return 0;
irq = platform_get_irq(pmu_device, 0);
......@@ -191,6 +191,10 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
/* Ensure the PMU has sane values out of reset. */
if (cpu_pmu->reset)
on_each_cpu(cpu_pmu->reset, cpu_pmu, 1);
/* If no interrupts available, set the corresponding capability flag */
if (!platform_get_irq(cpu_pmu->plat_device, 0))
cpu_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
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