Commit e879c862 authored by Russell King's avatar Russell King
Browse files

ARM: restart: only perform setup for restart when soft-restarting



We only need to set the system up for a soft-restart if we're going to
be doing a soft-restart.  Provide a new function (soft_restart()) which
does the setup and final call for this, and make platforms use it.
Eliminate the call to setup_restart() from the default handler.

This means that platforms arch_reset() function is no longer called with
the page tables prepared for a soft-restart, and caches will still be
enabled.
Acked-by: default avatarNicolas Pitre <nico@linaro.org>
Acked-by: default avatarWill Deacon <will.deacon@arm.com>
Acked-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Acked-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Acked-by: default avatarViresh Kumar <viresh.kumar@st.com>
Acked-by: default avatarKrzysztof Ha■asa <khc@pm.waw.pl>
Acked-by: default avatarPaul Mundt <lethal@linux-sh.org>
Acked-by: default avatarRichard Purdie <richard.purdie@linuxfoundation.org>
Acked-by: default avatarWan ZongShun <mcuos.com@gmail.com>
Acked-by: default avatarEric Miao <eric.y.miao@gmail.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 5aafec15
......@@ -101,6 +101,7 @@ extern int __pure cpu_architecture(void);
extern void cpu_init(void);
void arm_machine_restart(char mode, const char *cmd);
void soft_restart(unsigned long);
extern void (*arm_pm_restart)(char str, const char *cmd);
#define UDBG_UNDEFINED (1 << 0)
......
......@@ -92,7 +92,7 @@ static int __init hlt_setup(char *__unused)
__setup("nohlt", nohlt_setup);
__setup("hlt", hlt_setup);
void arm_machine_restart(char mode, const char *cmd)
void soft_restart(unsigned long addr)
{
/* Disable interrupts first */
local_irq_disable();
......@@ -114,7 +114,16 @@ void arm_machine_restart(char mode, const char *cmd)
/* Push out any further dirty data, and ensure cache is empty */
flush_cache_all();
/* Now call the architecture specific reboot code. */
cpu_reset(addr);
}
void arm_machine_restart(char mode, const char *cmd)
{
/* Disable interrupts first */
local_irq_disable();
local_fiq_disable();
/* Call the architecture specific reboot code. */
arch_reset(mode, cmd);
}
......
......@@ -34,7 +34,7 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode, const char *cmd)
{
cpu_reset(0);
soft_restart(0);
}
#endif
......@@ -34,6 +34,6 @@ static inline void arch_idle(void)
asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
}
#define arch_reset(mode, cmd) cpu_reset(0x80000000)
#define arch_reset(mode, cmd) soft_restart(0x80000000)
#endif
......@@ -24,7 +24,7 @@ static inline void arch_reset(char mode, const char *cmd)
/*
* Jump into the ROM
*/
cpu_reset(0x41000000);
soft_restart(0x41000000);
} else {
if (machine_is_netwinder()) {
/* open up the SuperIO chip
......
......@@ -30,5 +30,5 @@ static inline void arch_reset(char mode, const char *cmd)
*IOP3XX_PCSR = 0x30;
/* Jump into ROM at address 0 */
cpu_reset(0);
soft_restart(0);
}
......@@ -19,5 +19,5 @@ static inline void arch_reset(char mode, const char *cmd)
*IOP3XX_PCSR = 0x30;
/* Jump into ROM at address 0 */
cpu_reset(0);
soft_restart(0);
}
......@@ -26,7 +26,7 @@ static inline void arch_reset(char mode, const char *cmd)
{
if ( 1 && mode == 's') {
/* Jump into ROM at address 0 */
cpu_reset(0);
soft_restart(0);
} else {
/* Use on-chip reset capability */
......
......@@ -32,7 +32,7 @@ static void arch_reset(char mode, const char *cmd)
unsigned int reg;
if (mode == 's')
cpu_reset(0);
soft_restart(0);
/* disable timer0 */
reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
......
......@@ -19,8 +19,8 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode, const char *cmd)
{
if (cpu_is_pxa168())
cpu_reset(0xffff0000);
soft_restart(0xffff0000);
else
cpu_reset(0);
soft_restart(0);
}
#endif /* __ASM_MACH_SYSTEM_H */
......@@ -53,7 +53,7 @@ void arch_reset(char mode, const char *cmd)
mdelay(50);
/* We'll take a jump through zero as a poor second */
cpu_reset(0);
soft_restart(0);
}
static int __init mxs_arch_reset_init(void)
......
......@@ -32,7 +32,7 @@ static void arch_idle(void)
static inline void arch_reset(char mode, const char *cmd)
{
cpu_reset(0);
soft_restart(0);
}
#endif
......@@ -88,7 +88,7 @@ void arch_reset(char mode, const char *cmd)
switch (mode) {
case 's':
/* Jump into ROM at address 0 */
cpu_reset(0);
soft_restart(0);
break;
case 'g':
do_gpio_reset();
......
......@@ -23,5 +23,5 @@ static inline void arch_reset(char mode, const char *cmd)
/*
* Jump into the ROM
*/
cpu_reset(0);
soft_restart(0);
}
......@@ -19,7 +19,7 @@ static void
arch_reset(char mode, const char *cmd)
{
if (mode == 's') {
cpu_reset(0);
soft_restart(0);
}
if (s3c24xx_reset_hook)
......@@ -28,5 +28,5 @@ arch_reset(char mode, const char *cmd)
arch_wdt_reset();
/* we'll take a jump through zero as a poor second */
cpu_reset(0);
soft_restart(0);
}
......@@ -24,7 +24,7 @@ static void arch_reset(char mode, const char *cmd)
arch_wdt_reset();
/* if all else fails, or mode was for soft, jump to 0 */
cpu_reset(0);
soft_restart(0);
}
#endif /* __ASM_ARCH_IRQ_H */
......@@ -14,7 +14,7 @@ static inline void arch_reset(char mode, const char *cmd)
{
if (mode == 's') {
/* Jump into ROM at address 0 */
cpu_reset(0);
soft_restart(0);
} else {
/* Use on-chip reset capability */
RSRR = RSRR_SWR;
......
......@@ -8,7 +8,7 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode, const char *cmd)
{
cpu_reset(0);
soft_restart(0);
}
#endif
......@@ -33,7 +33,7 @@ static void arch_reset(char mode, const char *cmd)
{
if (mode == 's') {
/* Jump into ROM at address 0 */
cpu_reset(0);
soft_restart(0);
} else {
__raw_writel(WTE | WTRE | WTCLK, WTCR);
}
......
......@@ -70,7 +70,7 @@ void arch_reset(char mode, const char *cmd)
mdelay(50);
/* we'll take a jump through zero as a poor second */
cpu_reset(0);
soft_restart(0);
}
void mxc_arch_reset_init(void __iomem *base)
......
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