Commit e51c6837 authored by Javier Cardona's avatar Javier Cardona Committed by John W. Linville
Browse files

zd1211rw: Fixed incorrect constant name.



Trial and error reveals that CR_ZD1211B_TX_PWR_CTL* do not affect the
transmission power.  Instead these registers seem to control the contention
windows limits for different QoS access categories.
Signed-off-by: default avatarJavier Cardona <javier@cozybit.com>
Signed-off-by: default avatarDaniel Drake <dsd@gentoo.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 9f6adf23
...@@ -771,10 +771,10 @@ static int zd1211b_hw_init_hmac(struct zd_chip *chip) ...@@ -771,10 +771,10 @@ static int zd1211b_hw_init_hmac(struct zd_chip *chip)
{ {
static const struct zd_ioreq32 ioreqs[] = { static const struct zd_ioreq32 ioreqs[] = {
{ CR_ZD1211B_RETRY_MAX, 0x02020202 }, { CR_ZD1211B_RETRY_MAX, 0x02020202 },
{ CR_ZD1211B_TX_PWR_CTL4, 0x007f003f }, { CR_ZD1211B_CWIN_MAX_MIN_AC0, 0x007f003f },
{ CR_ZD1211B_TX_PWR_CTL3, 0x007f003f }, { CR_ZD1211B_CWIN_MAX_MIN_AC1, 0x007f003f },
{ CR_ZD1211B_TX_PWR_CTL2, 0x003f001f }, { CR_ZD1211B_CWIN_MAX_MIN_AC2, 0x003f001f },
{ CR_ZD1211B_TX_PWR_CTL1, 0x001f000f }, { CR_ZD1211B_CWIN_MAX_MIN_AC3, 0x001f000f },
{ CR_ZD1211B_AIFS_CTL1, 0x00280028 }, { CR_ZD1211B_AIFS_CTL1, 0x00280028 },
{ CR_ZD1211B_AIFS_CTL2, 0x008C003C }, { CR_ZD1211B_AIFS_CTL2, 0x008C003C },
{ CR_ZD1211B_TXOP, 0x01800824 }, { CR_ZD1211B_TXOP, 0x01800824 },
......
...@@ -625,11 +625,10 @@ enum { ...@@ -625,11 +625,10 @@ enum {
#define CR_S_MD CTL_REG(0x0830) #define CR_S_MD CTL_REG(0x0830)
#define CR_USB_DEBUG_PORT CTL_REG(0x0888) #define CR_USB_DEBUG_PORT CTL_REG(0x0888)
#define CR_ZD1211B_CWIN_MAX_MIN_AC0 CTL_REG(0x0b00)
#define CR_ZD1211B_TX_PWR_CTL1 CTL_REG(0x0b00) #define CR_ZD1211B_CWIN_MAX_MIN_AC1 CTL_REG(0x0b04)
#define CR_ZD1211B_TX_PWR_CTL2 CTL_REG(0x0b04) #define CR_ZD1211B_CWIN_MAX_MIN_AC2 CTL_REG(0x0b08)
#define CR_ZD1211B_TX_PWR_CTL3 CTL_REG(0x0b08) #define CR_ZD1211B_CWIN_MAX_MIN_AC3 CTL_REG(0x0b0c)
#define CR_ZD1211B_TX_PWR_CTL4 CTL_REG(0x0b0c)
#define CR_ZD1211B_AIFS_CTL1 CTL_REG(0x0b10) #define CR_ZD1211B_AIFS_CTL1 CTL_REG(0x0b10)
#define CR_ZD1211B_AIFS_CTL2 CTL_REG(0x0b14) #define CR_ZD1211B_AIFS_CTL2 CTL_REG(0x0b14)
#define CR_ZD1211B_TXOP CTL_REG(0x0b20) #define CR_ZD1211B_TXOP CTL_REG(0x0b20)
......
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