Commit e36ce6eb authored by Rob Herring's avatar Rob Herring Committed by David S. Miller
Browse files

net: calxedaxgmac: set outstanding AXI bus transactions to 8



Increase the number of outstanding read and write AXI transactions from 1
to 8 for better performance.
Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 7c400919
......@@ -970,7 +970,7 @@ static int xgmac_hw_init(struct net_device *dev)
writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_INTR_ENA);
/* XGMAC requires AXI bus init. This is a 'magic number' for now */
writel(0x000100E, ioaddr + XGMAC_DMA_AXI_BUS);
writel(0x0077000E, ioaddr + XGMAC_DMA_AXI_BUS);
ctrl |= XGMAC_CONTROL_DDIC | XGMAC_CONTROL_JE | XGMAC_CONTROL_ACS |
XGMAC_CONTROL_CAR;
......
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