Commit dc8d966b authored by Rob Herring's avatar Rob Herring
Browse files

ARM: pci: make pcibios_assign_all_busses use pci_has_flag



Convert pcibios_assign_all_busses from a define to inline so platforms can
control this setting.
Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Acked-by: default avatarNicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
parent b480a4b0
......@@ -3,10 +3,16 @@
#ifdef __KERNEL__
#include <asm-generic/pci-dma-compat.h>
#include <asm-generic/pci-bridge.h>
#include <asm/mach/pci.h> /* for pci_sys_data */
#include <mach/hardware.h> /* for PCIBIOS_MIN_* */
static inline int pcibios_assign_all_busses(void)
{
return pci_has_flag(PCI_REASSIGN_ALL_RSRC);
}
#ifdef CONFIG_PCI_DOMAINS
static inline int pci_domain_nr(struct pci_bus *bus)
{
......
......@@ -36,8 +36,6 @@
#define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED)
#define RAM_BASE PAGE_OFFSET
#define pcibios_assign_all_busses() 1
/* Macros to make managing spinlocks a bit more controlled in terms of naming. */
/* See reg_gpio.h, reg_irq.h, arch.c, gpio.c for example usage. */
#if defined(__KERNEL__)
......
......@@ -17,6 +17,5 @@
/* macro to get at IO space when running virtually */
#define PCIBIOS_MIN_IO 0x00000000
#define PCIBIOS_MIN_MEM 0x00000000
#define pcibios_assign_all_busses() 1
#endif
......@@ -11,8 +11,6 @@
#include "dove.h"
#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x1000
#define PCIBIOS_MIN_MEM 0x01000000
#define PCIMEM_BASE DOVE_PCIE0_MEM_PHYS_BASE
......
......@@ -8,8 +8,6 @@
#include <mach/ep93xx-regs.h>
#include <mach/platform.h>
#define pcibios_assign_all_busses() 0
/*
* The EP93xx has two external crystal oscillators. To generate the
* required high-frequency clocks, the processor uses two phase-locked-
......
......@@ -100,8 +100,6 @@ extern unsigned int nw_gpio_read(void);
extern void nw_cpld_modify(unsigned int mask, unsigned int set);
#endif
#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x1000
#define PCIBIOS_MIN_MEM 0x81000000
......
......@@ -34,8 +34,6 @@
#define PCIMEM_BASE PCI_MEMORY_VADDR
#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x6000
#define PCIBIOS_MIN_MEM 0x00100000
......
......@@ -2,8 +2,6 @@
#define __ASM_ARCH_HARDWARE_H
#include <asm/types.h>
#define pcibios_assign_all_busses() 1
#ifndef __ASSEMBLY__
extern unsigned long iop13xx_pcibios_min_io;
extern unsigned long iop13xx_pcibios_min_mem;
......
......@@ -18,7 +18,6 @@
* but when we read them, we convert them to virtual addresses. See
* arch/arm/plat-iop/pci.c.
*/
#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x00000000
#define PCIBIOS_MIN_MEM 0x00000000
......
......@@ -18,7 +18,6 @@
* but when we read them, we convert them to virtual addresses. See
* arch/arm/mach-iop3xx/iop3xx-pci.c
*/
#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x00000000
#define PCIBIOS_MIN_MEM 0x00000000
......
......@@ -27,8 +27,6 @@
#include "ixp2000-regs.h" /* Chipset Registers */
#define pcibios_assign_all_busses() 0
/*
* Platform helper functions
*/
......
......@@ -196,6 +196,8 @@ clear_master_aborts(void)
void __init
ixp2000_pci_preinit(void)
{
pci_set_flags(0);
#ifndef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO
/*
* Configure the PCI unit to properly byteswap I/O transactions,
......
......@@ -20,8 +20,6 @@
#include "ixp23xx.h"
#define pcibios_assign_all_busses() 0
/*
* Platform helper functions
*/
......
......@@ -227,6 +227,8 @@ static void __init ixp23xx_pci_common_init(void)
void __init ixp23xx_pci_preinit(void)
{
pci_set_flags(0);
ixp23xx_pci_common_init();
hook_fault_code(16+6, ixp23xx_pci_abort_handler, SIGBUS, 0,
......
......@@ -28,8 +28,6 @@
#define ARCH_HAS_DMA_SET_COHERENT_MASK
#define pcibios_assign_all_busses() 1
/* Register locations and bits */
#include "ixp4xx-regs.h"
......
......@@ -11,9 +11,6 @@
#include "kirkwood.h"
#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x00001000
#define PCIBIOS_MIN_MEM 0x01000000
#define PCIMEM_BASE KIRKWOOD_PCIE_MEM_PHYS_BASE /* mem base for VGA */
......
......@@ -46,8 +46,6 @@
/*
* PCI support
*/
#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0
#define PCIBIOS_MIN_MEM 0
......
......@@ -11,8 +11,6 @@
#include "mv78xx0.h"
#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x00001000
#define PCIBIOS_MIN_MEM 0x01000000
#define PCIMEM_BASE MV78XX0_PCIE_MEM_PHYS_BASE /* mem base for VGA */
......
......@@ -11,8 +11,6 @@
#include "orion5x.h"
#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x00001000
#define PCIBIOS_MIN_MEM 0x01000000
#define PCIMEM_BASE ORION5X_PCIE_MEM_PHYS_BASE
......
......@@ -339,7 +339,6 @@ extern unsigned long get_clock_tick_rate(void);
#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
#define PCIBIOS_MIN_IO 0
#define PCIBIOS_MIN_MEM 0
#define pcibios_assign_all_busses() 1
#define ARCH_HAS_DMA_SET_COHERENT_MASK
#endif
......
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