Commit da9c177d authored by Ard Biesheuvel's avatar Ard Biesheuvel Committed by Will Deacon
Browse files

arm64: enforce x1|x2|x3 == 0 upon kernel entry as per boot protocol

According to the arm64 boot protocol, registers x1 to x3 should be
zero upon kernel entry, and non-zero values are reserved for future
use. This future use is going to be problematic if we never enforce
the current rules, so start enforcing them now, by emitting a warning
if non-zero values are detected.
Acked-by: default avatarMark Rutland <>
Signed-off-by: default avatarArd Biesheuvel <>
Signed-off-by: default avatarWill Deacon <>
parent 6f4d57fa
......@@ -233,7 +233,7 @@ section_table:
mov x21, x0 // x21=FDT
bl preserve_boot_args
bl el2_setup // Drop to EL1, w20=cpu_boot_mode
adrp x24, __PHYS_OFFSET
bl set_cpu_boot_mode_flag
......@@ -252,6 +252,23 @@ ENTRY(stext)
b __cpu_setup // initialise processor
* Preserve the arguments passed by the bootloader in x0 .. x3
mov x21, x0 // x21=FDT
adr_l x0, boot_args // record the contents of
stp x21, x1, [x0] // x0 .. x3 at kernel entry
stp x2, x3, [x0, #16]
dmb sy // needed before dc ivac with
// MMU off
add x1, x0, #0x20 // 4 x 8 bytes
b __inval_cache_range // tail call
* Determine validity of the x21 FDT pointer.
* The dtb must be 8-byte aligned and live in the first 512M of memory.
......@@ -115,6 +115,11 @@ void __init early_print(const char *str, ...)
printk("%s", buf);
* The recorded values of x0 .. x3 upon kernel entry.
u64 __cacheline_aligned boot_args[4];
void __init smp_setup_processor_id(void)
u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
......@@ -412,6 +417,12 @@ void __init setup_arch(char **cmdline_p)
conswitchp = &dummy_con;
if (boot_args[1] || boot_args[2] || boot_args[3]) {
pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n"
"\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n"
"This indicates a broken bootloader or old kernel\n",
boot_args[1], boot_args[2], boot_args[3]);
static int __init arm64_device_init(void)
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