Commit da206c9e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial

* git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial:
  typo fixes
  Clean up 'inline is not at beginning' warnings for usb storage
  Storage class should be first
  i386: Trivial typo fixes
  ixj: make ixj_set_tone_off() static
  spelling fixes
  fix paniced->panicked typos
  Spelling fixes for Documentation/atomic_ops.txt
  move acknowledgment for Mark Adler to CREDITS
  remove the bouncing email address of David Campbell
parents 916d1544 2e2d0dcc
......@@ -24,6 +24,11 @@ S: C. Negri 6, bl. D3
S: Iasi 6600
S: Romania
N: Mark Adler
E: madler@alumni.caltech.edu
W: http://alumnus.caltech.edu/~madler/
D: zlib decompression
N: Monalisa Agrawal
E: magrawal@nortelnetworks.com
D: Basic Interphase 5575 driver with UBR and ABR support.
......
......@@ -1590,7 +1590,7 @@ the amount of locking which needs to be done.
<para>
Our final dilemma is this: when can we actually destroy the
removed element? Remember, a reader might be stepping through
this element in the list right now: it we free this element and
this element in the list right now: if we free this element and
the <symbol>next</symbol> pointer changes, the reader will jump
off into garbage and crash. We need to wait until we know that
all the readers who were traversing the list when we deleted the
......
......@@ -157,13 +157,13 @@ For example, smp_mb__before_atomic_dec() can be used like so:
smp_mb__before_atomic_dec();
atomic_dec(&obj->ref_count);
It makes sure that all memory operations preceeding the atomic_dec()
It makes sure that all memory operations preceding the atomic_dec()
call are strongly ordered with respect to the atomic counter
operation. In the above example, it guarentees that the assignment of
operation. In the above example, it guarantees that the assignment of
"1" to obj->dead will be globally visible to other cpus before the
atomic counter decrement.
Without the explicitl smp_mb__before_atomic_dec() call, the
Without the explicit smp_mb__before_atomic_dec() call, the
implementation could legally allow the atomic counter update visible
to other cpus before the "obj->dead = 1;" assignment.
......@@ -173,11 +173,11 @@ ordering with respect to memory operations after an atomic_dec() call
(smp_mb__{before,after}_atomic_inc()).
A missing memory barrier in the cases where they are required by the
atomic_t implementation above can have disasterous results. Here is
an example, which follows a pattern occuring frequently in the Linux
atomic_t implementation above can have disastrous results. Here is
an example, which follows a pattern occurring frequently in the Linux
kernel. It is the use of atomic counters to implement reference
counting, and it works such that once the counter falls to zero it can
be guarenteed that no other entity can be accessing the object:
be guaranteed that no other entity can be accessing the object:
static void obj_list_add(struct obj *obj)
{
......@@ -291,9 +291,9 @@ to the size of an "unsigned long" C data type, and are least of that
size. The endianness of the bits within each "unsigned long" are the
native endianness of the cpu.
void set_bit(unsigned long nr, volatils unsigned long *addr);
void clear_bit(unsigned long nr, volatils unsigned long *addr);
void change_bit(unsigned long nr, volatils unsigned long *addr);
void set_bit(unsigned long nr, volatile unsigned long *addr);
void clear_bit(unsigned long nr, volatile unsigned long *addr);
void change_bit(unsigned long nr, volatile unsigned long *addr);
These routines set, clear, and change, respectively, the bit number
indicated by "nr" on the bit mask pointed to by "ADDR".
......@@ -301,9 +301,9 @@ indicated by "nr" on the bit mask pointed to by "ADDR".
They must execute atomically, yet there are no implicit memory barrier
semantics required of these interfaces.
int test_and_set_bit(unsigned long nr, volatils unsigned long *addr);
int test_and_clear_bit(unsigned long nr, volatils unsigned long *addr);
int test_and_change_bit(unsigned long nr, volatils unsigned long *addr);
int test_and_set_bit(unsigned long nr, volatile unsigned long *addr);
int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr);
int test_and_change_bit(unsigned long nr, volatile unsigned long *addr);
Like the above, except that these routines return a boolean which
indicates whether the changed bit was set _BEFORE_ the atomic bit
......@@ -335,7 +335,7 @@ subsequent memory operation is made visible. For example:
/* ... */;
obj->killed = 1;
The implementation of test_and_set_bit() must guarentee that
The implementation of test_and_set_bit() must guarantee that
"obj->dead = 1;" is visible to cpus before the atomic memory operation
done by test_and_set_bit() becomes visible. Likewise, the atomic
memory operation done by test_and_set_bit() must become visible before
......@@ -474,7 +474,7 @@ Now, as far as memory barriers go, as long as spin_lock()
strictly orders all subsequent memory operations (including
the cas()) with respect to itself, things will be fine.
Said another way, _atomic_dec_and_lock() must guarentee that
Said another way, _atomic_dec_and_lock() must guarantee that
a counter dropping to zero is never made visible before the
spinlock being acquired.
......
......@@ -18,7 +18,7 @@ Traditional driver models implemented some sort of tree-like structure
(sometimes just a list) for the devices they control. There wasn't any
uniformity across the different bus types.
The current driver model provides a comon, uniform data model for describing
The current driver model provides a common, uniform data model for describing
a bus and the devices that can appear under the bus. The unified bus
model includes a set of common attributes which all busses carry, and a set
of common callbacks, such as device discovery during bus probing, bus
......
......@@ -175,7 +175,7 @@ end
document trapinfo
Run info threads and lookup pid of thread #1
'trapinfo <pid>' will tell you by which trap & possibly
addresthe kernel paniced.
address the kernel panicked.
end
......
......@@ -12,5 +12,3 @@ http://www.torque.net/parport/
Email list for Linux Parport
linux-parport@torque.net
Email for problems with ZIP or ZIP Plus drivers
campbell@torque.net
......@@ -734,7 +734,7 @@ config KEXEC
help
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot
but it is indepedent of the system firmware. And like a reboot
but it is independent of the system firmware. And like a reboot
you can start any kernel with it, not just Linux.
The name comes from the similiarity to the exec system call.
......
......@@ -41,7 +41,7 @@ config M386
- "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
- "Geode GX/LX" For AMD Geode GX and LX processors.
- "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
- "VIA C3-2 for VIA C3-2 "Nehemiah" (model 9 and above).
- "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
If you don't know what to do, choose "386".
......
......@@ -354,7 +354,7 @@ static void __init init_nsc(struct cpuinfo_x86 *c)
* This function only handles the GX processor, and kicks every
* thing else to the Cyrix init function above - that should
* cover any processors that might have been branded differently
* after NSC aquired Cyrix.
* after NSC acquired Cyrix.
*
* If this breaks your GX1 horribly, please e-mail
* info-linux@ldcmail.amd.com to tell us.
......
......@@ -158,7 +158,7 @@ static void nmi_shootdown_cpus(void)
void machine_crash_shutdown(struct pt_regs *regs)
{
/* This function is only called after the system
* has paniced or is otherwise in a critical state.
* has panicked or is otherwise in a critical state.
* The minimum amount of code to allow a kexec'd kernel
* to run successfully needs to happen here.
*
......
......@@ -175,7 +175,7 @@ static void mask_and_ack_8259A(unsigned int irq)
* Lightweight spurious IRQ detection. We do not want
* to overdo spurious IRQ handling - it's usually a sign
* of hardware problems, so we only do the checks we can
* do without slowing down good hardware unnecesserily.
* do without slowing down good hardware unnecessarily.
*
* Note that IRQ7 and IRQ15 (the two spurious IRQs
* usually resulting from the 8259A-1|2 PICs) occur
......
......@@ -133,9 +133,9 @@ typedef asmlinkage NORET_TYPE void (*relocate_new_kernel_t)(
unsigned long start_address,
unsigned int has_pae) ATTRIB_NORET;
const extern unsigned char relocate_new_kernel[];
extern const unsigned char relocate_new_kernel[];
extern void relocate_new_kernel_end(void);
const extern unsigned int relocate_new_kernel_size;
extern const unsigned int relocate_new_kernel_size;
/*
* A architecture hook called to validate the
......
......@@ -59,7 +59,7 @@ void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr)
* bit_num - Indicates which bit number in the cause register
*
* Outputs :
* 1 if succesful, 0 if failure
* 1 if successful, 0 if failure
*/
int enable_galileo_irq(int int_cause, int bit_num)
{
......@@ -83,7 +83,7 @@ int enable_galileo_irq(int int_cause, int bit_num)
* bit_num - Indicates which bit number in the cause register
*
* Outputs :
* 1 if succesful, 0 if failure
* 1 if successful, 0 if failure
*/
int disable_galileo_irq(int int_cause, int bit_num)
{
......
......@@ -34,7 +34,7 @@
#define POWERDOWN_TIMEOUT 120
/*
* Blink frequency during reboot grace period and when paniced.
* Blink frequency during reboot grace period and when panicked.
*/
#define POWERDOWN_FREQ (HZ / 4)
#define PANIC_FREQ (HZ / 8)
......
......@@ -28,13 +28,13 @@
#define POWERDOWN_TIMEOUT 120
/*
* Blink frequency during reboot grace period and when paniced.
* Blink frequency during reboot grace period and when panicked.
*/
#define POWERDOWN_FREQ (HZ / 4)
#define PANIC_FREQ (HZ / 8)
static struct timer_list power_timer, blink_timer, debounce_timer;
static int has_paniced, shuting_down;
static int has_panicked, shuting_down;
static void ip32_machine_restart(char *command) __attribute__((noreturn));
static void ip32_machine_halt(void) __attribute__((noreturn));
......@@ -109,7 +109,7 @@ static void debounce(unsigned long data)
}
CMOS_WRITE(reg_a & ~DS_REGA_DV0, RTC_REG_A);
if (has_paniced)
if (has_panicked)
ip32_machine_restart(NULL);
enable_irq(MACEISA_RTC_IRQ);
......@@ -117,7 +117,7 @@ static void debounce(unsigned long data)
static inline void ip32_power_button(void)
{
if (has_paniced)
if (has_panicked)
return;
if (shuting_down || kill_proc(1, SIGINT, 1)) {
......@@ -161,9 +161,9 @@ static int panic_event(struct notifier_block *this, unsigned long event,
{
unsigned long led;
if (has_paniced)
if (has_panicked)
return NOTIFY_DONE;
has_paniced = 1;
has_panicked = 1;
/* turn off the green LED */
led = mace->perif.ctrl.misc | MACEISA_LED_GREEN;
......
......@@ -179,7 +179,7 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
/*
* This function is only called after the system
* has paniced or is otherwise in a critical state.
* has panicked or is otherwise in a critical state.
* The minimum amount of code to allow a kexec'd kernel
* to run successfully needs to happen here.
*
......
......@@ -30,8 +30,8 @@ typedef NORET_TYPE void (*relocate_new_kernel_t)(
*/
void default_machine_kexec(struct kimage *image)
{
const extern unsigned char relocate_new_kernel[];
const extern unsigned int relocate_new_kernel_size;
extern const unsigned char relocate_new_kernel[];
extern const unsigned int relocate_new_kernel_size;
unsigned long page_list;
unsigned long reboot_code_buffer, reboot_code_buffer_phys;
relocate_new_kernel_t rnk;
......
......@@ -2100,7 +2100,7 @@ EXPORT_SYMBOL_GPL(spu_save);
* @spu: pointer to SPU iomem structure.
*
* Perform harvest + restore, as we may not be coming
* from a previous succesful save operation, and the
* from a previous successful save operation, and the
* hardware state is unknown.
*/
int spu_restore(struct spu_state *new, struct spu *spu)
......
......@@ -287,7 +287,7 @@ void pci_addr_cache_remove_device(struct pci_dev *dev)
* find the pci device that corresponds to a given address.
* This routine scans all pci busses to build the cache.
* Must be run late in boot process, after the pci controllers
* have been scaned for devices (after all device resources are known).
* have been scanned for devices (after all device resources are known).
*/
void __init pci_addr_cache_build(void)
{
......
......@@ -25,8 +25,8 @@ typedef NORET_TYPE void (*relocate_new_kernel_t)(
unsigned long reboot_code_buffer,
unsigned long start_address) ATTRIB_NORET;
const extern unsigned char relocate_new_kernel[];
const extern unsigned int relocate_new_kernel_size;
extern const unsigned char relocate_new_kernel[];
extern const unsigned int relocate_new_kernel_size;
void machine_shutdown(void)
{
......
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