Commit d8c92107 authored by Christian Lamparter's avatar Christian Lamparter Committed by John W. Linville

p54: Modify p54 files for new organization

Modify the remaining p54 files to account for the new file organization.
Signed-off-by: default avatarChristian Lamparter <chunkeey@web.de>
Signed-off-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 0a5fb84f
p54common-objs := eeprom.o fwio.o txrx.o main.o
p54common-$(CONFIG_P54_LEDS) += led.o
obj-$(CONFIG_P54_COMMON) += p54common.o
obj-$(CONFIG_P54_USB) += p54usb.o
obj-$(CONFIG_P54_PCI) += p54pci.o
......
#ifndef P54_H
#define P54_H
/*
* Shared defines for all mac80211 Prism54 code
*
......@@ -14,39 +11,78 @@
* published by the Free Software Foundation.
*/
#ifndef P54_H
#define P54_H
#ifdef CONFIG_P54_LEDS
#include <linux/leds.h>
#endif /* CONFIG_P54_LEDS */
enum p54_control_frame_types {
P54_CONTROL_TYPE_SETUP = 0,
P54_CONTROL_TYPE_SCAN,
P54_CONTROL_TYPE_TRAP,
P54_CONTROL_TYPE_DCFINIT,
P54_CONTROL_TYPE_RX_KEYCACHE,
P54_CONTROL_TYPE_TIM,
P54_CONTROL_TYPE_PSM,
P54_CONTROL_TYPE_TXCANCEL,
P54_CONTROL_TYPE_TXDONE,
P54_CONTROL_TYPE_BURST,
P54_CONTROL_TYPE_STAT_READBACK,
P54_CONTROL_TYPE_BBP,
P54_CONTROL_TYPE_EEPROM_READBACK,
P54_CONTROL_TYPE_LED,
P54_CONTROL_TYPE_GPIO,
P54_CONTROL_TYPE_TIMER,
P54_CONTROL_TYPE_MODULATION,
P54_CONTROL_TYPE_SYNTH_CONFIG,
P54_CONTROL_TYPE_DETECTOR_VALUE,
P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
P54_CONTROL_TYPE_CCE_QUIET,
P54_CONTROL_TYPE_PSM_STA_UNLOCK,
P54_CONTROL_TYPE_PCS,
P54_CONTROL_TYPE_BT_BALANCER = 28,
P54_CONTROL_TYPE_GROUP_ADDRESS_TABLE = 30,
P54_CONTROL_TYPE_ARPTABLE = 31,
P54_CONTROL_TYPE_BT_OPTIONS = 35
};
#define ISL38XX_DEV_FIRMWARE_ADDR 0x20000
#define BR_CODE_MIN 0x80000000
#define BR_CODE_COMPONENT_ID 0x80000001
#define BR_CODE_COMPONENT_VERSION 0x80000002
#define BR_CODE_DEPENDENT_IF 0x80000003
#define BR_CODE_EXPOSED_IF 0x80000004
#define BR_CODE_DESCR 0x80000101
#define BR_CODE_MAX 0x8FFFFFFF
#define BR_CODE_END_OF_BRA 0xFF0000FF
#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
struct bootrec {
__le32 code;
__le32 len;
u32 data[10];
} __packed;
/* Interface role definitions */
#define BR_INTERFACE_ROLE_SERVER 0x0000
#define BR_INTERFACE_ROLE_CLIENT 0x8000
#define BR_DESC_PRIV_CAP_WEP BIT(0)
#define BR_DESC_PRIV_CAP_TKIP BIT(1)
#define BR_DESC_PRIV_CAP_MICHAEL BIT(2)
#define BR_DESC_PRIV_CAP_CCX_CP BIT(3)
#define BR_DESC_PRIV_CAP_CCX_MIC BIT(4)
#define BR_DESC_PRIV_CAP_AESCCMP BIT(5)
struct bootrec_desc {
__le16 modes;
__le16 flags;
__le32 rx_start;
__le32 rx_end;
u8 headroom;
u8 tailroom;
u8 tx_queues;
u8 tx_depth;
u8 privacy_caps;
u8 rx_keycache_size;
u8 time_size;
u8 padding;
u8 rates[16];
u8 padding2[4];
__le16 rx_mtu;
} __packed;
#define FW_FMAC 0x464d4143
#define FW_LM86 0x4c4d3836
#define FW_LM87 0x4c4d3837
#define FW_LM20 0x4c4d3230
struct bootrec_comp_id {
__le32 fw_variant;
} __packed;
struct bootrec_comp_ver {
char fw_version[24];
} __packed;
struct bootrec_end {
__le16 crc;
u8 padding[2];
u8 md5[16];
} __packed;
/* provide 16 bytes for the transport back-end */
#define P54_TX_INFO_DATA_SIZE 16
......@@ -55,34 +91,30 @@ enum p54_control_frame_types {
struct p54_tx_info {
u32 start_addr;
u32 end_addr;
void *data[P54_TX_INFO_DATA_SIZE / sizeof(void *)];
union {
void *data[P54_TX_INFO_DATA_SIZE / sizeof(void *)];
struct {
u32 extra_len;
};
};
};
#define P54_MAX_CTRL_FRAME_LEN 0x1000
#define P54_HDR_FLAG_CONTROL BIT(15)
#define P54_HDR_FLAG_CONTROL_OPSET (BIT(15) + BIT(0))
struct p54_hdr {
__le16 flags;
__le16 len;
__le32 req_id;
__le16 type; /* enum p54_control_frame_types */
u8 rts_tries;
u8 tries;
u8 data[0];
} __attribute__ ((packed));
#define FREE_AFTER_TX(skb) \
((((struct p54_hdr *) ((struct sk_buff *) skb)->data)-> \
flags) == cpu_to_le16(P54_HDR_FLAG_CONTROL_OPSET))
#define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
do { \
queue.aifs = cpu_to_le16(ai_fs); \
queue.cwmin = cpu_to_le16(cw_min); \
queue.cwmax = cpu_to_le16(cw_max); \
queue.txop = cpu_to_le16(_txop); \
} while (0)
struct p54_edcf_queue_param {
__le16 aifs;
__le16 cwmin;
__le16 cwmax;
__le16 txop;
} __attribute__ ((packed));
} __packed;
struct p54_rssi_linear_approximation {
s16 mul;
......@@ -101,13 +133,6 @@ struct p54_cal_database {
#define EEPROM_READBACK_LEN 0x3fc
#define ISL38XX_DEV_FIRMWARE_ADDR 0x20000
#define FW_FMAC 0x464d4143
#define FW_LM86 0x4c4d3836
#define FW_LM87 0x4c4d3837
#define FW_LM20 0x4c4d3230
enum fw_state {
FW_STATE_OFF,
FW_STATE_BOOTING,
......@@ -138,6 +163,7 @@ struct p54_common {
void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb);
int (*open)(struct ieee80211_hw *dev);
void (*stop)(struct ieee80211_hw *dev);
struct sk_buff_head tx_pending;
struct sk_buff_head tx_queue;
struct mutex conf_mutex;
......@@ -156,6 +182,7 @@ struct p54_common {
/* (e)DCF / QOS state */
bool use_short_slot;
spinlock_t tx_stats_lock;
struct ieee80211_tx_queue_stats tx_stats[8];
struct p54_edcf_queue_param qos_params[8];
......@@ -181,7 +208,7 @@ struct p54_common {
u32 tsf_low32, tsf_high32;
u32 basic_rate_mask;
u16 aid;
struct sk_buff *cached_beacon;
__le32 beacon_req_id;
/* cryptographic engine information */
u8 privacy_caps;
......@@ -202,15 +229,20 @@ struct p54_common {
/* eeprom handling */
void *eeprom;
struct completion eeprom_comp;
struct mutex eeprom_mutex;
};
/* interfaces for the drivers */
int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb);
void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb);
int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw);
int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len);
int p54_read_eeprom(struct ieee80211_hw *dev);
struct ieee80211_hw *p54_init_common(size_t priv_data_len);
int p54_register_common(struct ieee80211_hw *dev, struct device *pdev);
void p54_free_common(struct ieee80211_hw *dev);
void p54_unregister_common(struct ieee80211_hw *dev);
#endif /* P54_H */
This diff is collapsed.
#ifndef P54COMMON_H
#define P54COMMON_H
/*
* Common code specific definitions for mac80211 Prism54 drivers
*
* Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
* Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
*
* Based on:
* - the islsm (softmac prism54) driver, which is:
* Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
*
* - LMAC API interface header file for STLC4560 (lmac_longbow.h)
* Copyright (C) 2007 Conexant Systems, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
struct bootrec {
__le32 code;
__le32 len;
u32 data[10];
} __attribute__((packed));
#define PDR_SYNTH_FRONTEND_MASK 0x0007
#define PDR_SYNTH_FRONTEND_DUETTE3 0x0001
#define PDR_SYNTH_FRONTEND_DUETTE2 0x0002
#define PDR_SYNTH_FRONTEND_FRISBEE 0x0003
#define PDR_SYNTH_FRONTEND_XBOW 0x0004
#define PDR_SYNTH_FRONTEND_LONGBOW 0x0005
#define PDR_SYNTH_IQ_CAL_MASK 0x0018
#define PDR_SYNTH_IQ_CAL_PA_DETECTOR 0x0000
#define PDR_SYNTH_IQ_CAL_DISABLED 0x0008
#define PDR_SYNTH_IQ_CAL_ZIF 0x0010
#define PDR_SYNTH_FAA_SWITCH_MASK 0x0020
#define PDR_SYNTH_FAA_SWITCH_ENABLED 0x0020
#define PDR_SYNTH_24_GHZ_MASK 0x0040
#define PDR_SYNTH_24_GHZ_DISABLED 0x0040
#define PDR_SYNTH_5_GHZ_MASK 0x0080
#define PDR_SYNTH_5_GHZ_DISABLED 0x0080
#define PDR_SYNTH_RX_DIV_MASK 0x0100
#define PDR_SYNTH_RX_DIV_SUPPORTED 0x0100
#define PDR_SYNTH_TX_DIV_MASK 0x0200
#define PDR_SYNTH_TX_DIV_SUPPORTED 0x0200
struct bootrec_exp_if {
__le16 role;
__le16 if_id;
__le16 variant;
__le16 btm_compat;
__le16 top_compat;
} __attribute__((packed));
#define BR_DESC_PRIV_CAP_WEP BIT(0)
#define BR_DESC_PRIV_CAP_TKIP BIT(1)
#define BR_DESC_PRIV_CAP_MICHAEL BIT(2)
#define BR_DESC_PRIV_CAP_CCX_CP BIT(3)
#define BR_DESC_PRIV_CAP_CCX_MIC BIT(4)
#define BR_DESC_PRIV_CAP_AESCCMP BIT(5)
struct bootrec_desc {
__le16 modes;
__le16 flags;
__le32 rx_start;
__le32 rx_end;
u8 headroom;
u8 tailroom;
u8 tx_queues;
u8 tx_depth;
u8 privacy_caps;
u8 rx_keycache_size;
u8 time_size;
u8 padding;
u8 rates[16];
u8 padding2[4];
__le16 rx_mtu;
} __attribute__((packed));
#define BR_CODE_MIN 0x80000000
#define BR_CODE_COMPONENT_ID 0x80000001
#define BR_CODE_COMPONENT_VERSION 0x80000002
#define BR_CODE_DEPENDENT_IF 0x80000003
#define BR_CODE_EXPOSED_IF 0x80000004
#define BR_CODE_DESCR 0x80000101
#define BR_CODE_MAX 0x8FFFFFFF
#define BR_CODE_END_OF_BRA 0xFF0000FF
#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
#define P54_HDR_FLAG_DATA_ALIGN BIT(14)
#define P54_HDR_FLAG_DATA_OUT_PROMISC BIT(0)
#define P54_HDR_FLAG_DATA_OUT_TIMESTAMP BIT(1)
#define P54_HDR_FLAG_DATA_OUT_SEQNR BIT(2)
#define P54_HDR_FLAG_DATA_OUT_BIT3 BIT(3)
#define P54_HDR_FLAG_DATA_OUT_BURST BIT(4)
#define P54_HDR_FLAG_DATA_OUT_NOCANCEL BIT(5)
#define P54_HDR_FLAG_DATA_OUT_CLEARTIM BIT(6)
#define P54_HDR_FLAG_DATA_OUT_HITCHHIKE BIT(7)
#define P54_HDR_FLAG_DATA_OUT_COMPRESS BIT(8)
#define P54_HDR_FLAG_DATA_OUT_CONCAT BIT(9)
#define P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT BIT(10)
#define P54_HDR_FLAG_DATA_OUT_WAITEOSP BIT(11)
#define P54_HDR_FLAG_DATA_IN_FCS_GOOD BIT(0)
#define P54_HDR_FLAG_DATA_IN_MATCH_MAC BIT(1)
#define P54_HDR_FLAG_DATA_IN_MCBC BIT(2)
#define P54_HDR_FLAG_DATA_IN_BEACON BIT(3)
#define P54_HDR_FLAG_DATA_IN_MATCH_BSS BIT(4)
#define P54_HDR_FLAG_DATA_IN_BCAST_BSS BIT(5)
#define P54_HDR_FLAG_DATA_IN_DATA BIT(6)
#define P54_HDR_FLAG_DATA_IN_TRUNCATED BIT(7)
#define P54_HDR_FLAG_DATA_IN_BIT8 BIT(8)
#define P54_HDR_FLAG_DATA_IN_TRANSPARENT BIT(9)
/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
struct pda_entry {
__le16 len; /* includes both code and data */
__le16 code;
u8 data[0];
} __attribute__ ((packed));
struct eeprom_pda_wrap {
__le32 magic;
__le16 pad;
__le16 len;
__le32 arm_opcode;
u8 data[0];
} __attribute__ ((packed));
struct p54_iq_autocal_entry {
__le16 iq_param[4];
} __attribute__ ((packed));
struct pda_iq_autocal_entry {
__le16 freq;
struct p54_iq_autocal_entry params;
} __attribute__ ((packed));
struct pda_channel_output_limit {
__le16 freq;
u8 val_bpsk;
u8 val_qpsk;
u8 val_16qam;
u8 val_64qam;
u8 rate_set_mask;
u8 rate_set_size;
} __attribute__ ((packed));
struct pda_pa_curve_data_sample_rev0 {
u8 rf_power;
u8 pa_detector;
u8 pcv;
} __attribute__ ((packed));
struct pda_pa_curve_data_sample_rev1 {
u8 rf_power;
u8 pa_detector;
u8 data_barker;
u8 data_bpsk;
u8 data_qpsk;
u8 data_16qam;
u8 data_64qam;
} __attribute__ ((packed));
struct p54_pa_curve_data_sample {
u8 rf_power;
u8 pa_detector;
u8 data_barker;
u8 data_bpsk;
u8 data_qpsk;
u8 data_16qam;
u8 data_64qam;
u8 padding;
} __attribute__ ((packed));
struct pda_pa_curve_data {
u8 cal_method_rev;
u8 channels;
u8 points_per_channel;
u8 padding;
u8 data[0];
} __attribute__ ((packed));
struct pda_rssi_cal_entry {
__le16 mul;
__le16 add;
} __attribute__ ((packed));
struct pda_country {
u8 regdomain;
u8 alpha2[2];
u8 flags;
} __attribute__ ((packed));
/*
* Warning: Longbow's structures are bogus.
*/
struct p54_channel_output_limit_longbow {
__le16 rf_power_points[12];
} __attribute__ ((packed));
struct p54_pa_curve_data_sample_longbow {
__le16 rf_power;
__le16 pa_detector;
struct {
__le16 data[4];
} points[3] __attribute__ ((packed));
} __attribute__ ((packed));
struct pda_custom_wrapper {
__le16 entries;
__le16 entry_size;
__le16 offset;
__le16 len;
u8 data[0];
} __attribute__ ((packed));
/*
* this defines the PDR codes used to build PDAs as defined in document
* number 553155. The current implementation mirrors version 1.1 of the
* document and lists only PDRs supported by the ARM platform.
*/
/* common and choice range (0x0000 - 0x0fff) */
#define PDR_END 0x0000
#define PDR_MANUFACTURING_PART_NUMBER 0x0001
#define PDR_PDA_VERSION 0x0002
#define PDR_NIC_SERIAL_NUMBER 0x0003
#define PDR_MAC_ADDRESS 0x0101
#define PDR_REGULATORY_DOMAIN_LIST 0x0103
#define PDR_TEMPERATURE_TYPE 0x0107
#define PDR_PRISM_PCI_IDENTIFIER 0x0402
/* ARM range (0x1000 - 0x1fff) */
#define PDR_COUNTRY_INFORMATION 0x1000
#define PDR_INTERFACE_LIST 0x1001
#define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
#define PDR_OEM_NAME 0x1003
#define PDR_PRODUCT_NAME 0x1004
#define PDR_UTF8_OEM_NAME 0x1005
#define PDR_UTF8_PRODUCT_NAME 0x1006
#define PDR_COUNTRY_LIST 0x1007
#define PDR_DEFAULT_COUNTRY 0x1008
#define PDR_ANTENNA_GAIN 0x1100
#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
#define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
#define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
#define PDR_REGULATORY_POWER_LIMITS 0x1907
#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
#define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
#define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
/* reserved range (0x2000 - 0x7fff) */
/* customer range (0x8000 - 0xffff) */
#define PDR_BASEBAND_REGISTERS 0x8000
#define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
/* used by our modificated eeprom image */
#define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM 0xDEAD
#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM 0xBEEF
#define PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM 0xB05D
/* PDR definitions for default country & country list */
#define PDR_COUNTRY_CERT_CODE 0x80
#define PDR_COUNTRY_CERT_CODE_REAL 0x00
#define PDR_COUNTRY_CERT_CODE_PSEUDO 0x80
#define PDR_COUNTRY_CERT_BAND 0x40
#define PDR_COUNTRY_CERT_BAND_2GHZ 0x00
#define PDR_COUNTRY_CERT_BAND_5GHZ 0x40
#define PDR_COUNTRY_CERT_IODOOR 0x30
#define PDR_COUNTRY_CERT_IODOOR_BOTH 0x00
#define PDR_COUNTRY_CERT_IODOOR_INDOOR 0x20
#define PDR_COUNTRY_CERT_IODOOR_OUTDOOR 0x30
#define PDR_COUNTRY_CERT_INDEX 0x0F
struct p54_eeprom_lm86 {
union {
struct {
__le16 offset;
__le16 len;
u8 data[0];
} v1;
struct {
__le32 offset;
__le16 len;
u8 magic2;
u8 pad;
u8 magic[4];
u8 data[0];
} v2;
} __attribute__ ((packed));
} __attribute__ ((packed));
enum p54_rx_decrypt_status {
P54_DECRYPT_NONE = 0,
P54_DECRYPT_OK,
P54_DECRYPT_NOKEY,
P54_DECRYPT_NOMICHAEL,
P54_DECRYPT_NOCKIPMIC,
P54_DECRYPT_FAIL_WEP,
P54_DECRYPT_FAIL_TKIP,
P54_DECRYPT_FAIL_MICHAEL,
P54_DECRYPT_FAIL_CKIPKP,
P54_DECRYPT_FAIL_CKIPMIC,
P54_DECRYPT_FAIL_AESCCMP
};
struct p54_rx_data {
__le16 flags;
__le16 len;
__le16 freq;
u8 antenna;
u8 rate;
u8 rssi;
u8 quality;
u8 decrypt_status;
u8 rssi_raw;
__le32 tsf32;
__le32 unalloc0;
u8 align[0];
} __attribute__ ((packed));
enum p54_trap_type {
P54_TRAP_SCAN = 0,
P54_TRAP_TIMER,
P54_TRAP_BEACON_TX,
P54_TRAP_FAA_RADIO_ON,
P54_TRAP_FAA_RADIO_OFF,
P54_TRAP_RADAR,
P54_TRAP_NO_BEACON,
P54_TRAP_TBTT,
P54_TRAP_SCO_ENTER,
P54_TRAP_SCO_EXIT
};
struct p54_trap {
__le16 event;
__le16 frequency;
} __attribute__ ((packed));
enum p54_frame_sent_status {
P54_TX_OK = 0,
P54_TX_FAILED,
P54_TX_PSM,
P54_TX_PSM_CANCELLED = 4
};
struct p54_frame_sent {
u8 status;
u8 tries;
u8 ack_rssi;
u8 quality;
__le16 seq;
u8 antenna;
u8 padding;
} __attribute__ ((packed));
enum p54_tx_data_crypt {
P54_CRYPTO_NONE = 0,
P54_CRYPTO_WEP,
P54_CRYPTO_TKIP,
P54_CRYPTO_TKIPMICHAEL,
P54_CRYPTO_CCX_WEPMIC,
P54_CRYPTO_CCX_KPMIC,
P54_CRYPTO_CCX_KP,
P54_CRYPTO_AESCCMP
};
enum p54_tx_data_queue {
P54_QUEUE_BEACON = 0,
P54_QUEUE_FWSCAN = 1,
P54_QUEUE_MGMT = 2,
P54_QUEUE_CAB = 3,
P54_QUEUE_DATA = 4,
P54_QUEUE_AC_NUM = 4,
P54_QUEUE_AC_VO = 4,
P54_QUEUE_AC_VI = 5,
P54_QUEUE_AC_BE = 6,
P54_QUEUE_AC_BK = 7,
/* keep last */
P54_QUEUE_NUM = 8,
};
struct p54_tx_data {
u8 rateset[8];
u8 rts_rate_idx;
u8 crypt_offset;
u8 key_type;
u8 key_len;
u8 key[16];
u8 hw_queue;