Commit d87f9b5e authored by Anton Burtsev's avatar Anton Burtsev Committed by Vikram Narayanan
Browse files

Changed regs to be a data structure vs an array

Not tested, can't test because of the PAT problems
parent d41ab5b9
......@@ -53,25 +53,46 @@ struct lcd_arch_vmcs {
#define LCD_ARCH_NUM_AUTOLOAD_MSRS 1
enum lcd_arch_reg {
LCD_ARCH_REGS_RAX = 0,
LCD_ARCH_REGS_RCX = 1,
LCD_ARCH_REGS_RDX = 2,
LCD_ARCH_REGS_RBX = 3,
LCD_ARCH_REGS_RSP = 4,
LCD_ARCH_REGS_RBP = 5,
LCD_ARCH_REGS_RSI = 6,
LCD_ARCH_REGS_RDI = 7,
LCD_ARCH_REGS_R8 = 8,
LCD_ARCH_REGS_R9 = 9,
LCD_ARCH_REGS_R10 = 10,
LCD_ARCH_REGS_R11 = 11,
LCD_ARCH_REGS_R12 = 12,
LCD_ARCH_REGS_R13 = 13,
LCD_ARCH_REGS_R14 = 14,
LCD_ARCH_REGS_R15 = 15,
LCD_ARCH_REGS_RIP,
LCD_ARCH_NUM_REGS
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
/* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */
#define __DECL_REG(name) union { \
uint64_t r ## name, e ## name; \
uint32_t _e ## name; \
}
#else
/* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */
#define __DECL_REG(name) uint64_t r ## name
#endif
struct cpu_user_regs {
uint64_t r15;
uint64_t r14;
uint64_t r13;
uint64_t r12;
__DECL_REG(bp);
__DECL_REG(bx);
uint64_t r11;
uint64_t r10;
uint64_t r9;
uint64_t r8;
__DECL_REG(ax);
__DECL_REG(cx);
__DECL_REG(dx);
__DECL_REG(si);
__DECL_REG(di);
uint32_t error_code; /* private */
uint32_t entry_vector; /* private */
__DECL_REG(ip);
uint16_t cs, _pad0[1];
uint8_t saved_upcall_mask;
uint8_t _pad1[3];
__DECL_REG(flags); /* rflags.IF == !saved_upcall_mask */
__DECL_REG(sp);
uint16_t ss, _pad2[3];
uint16_t es, _pad3[3];
uint16_t ds, _pad4[3];
uint16_t fs, _pad5[3]; /* Non-zero => takes precedence over fs_base. */
uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */
};
#define LCD_ARCH_EPT_WALK_LENGTH 4
......@@ -180,7 +201,7 @@ struct lcd_arch {
* Stuff we need to save explicitly
*/
u64 host_rsp;
u64 regs[LCD_ARCH_NUM_REGS];
struct cpu_user_regs regs;
u64 cr2;
int shutdown;
......@@ -343,7 +364,7 @@ int lcd_arch_set_gva_root(struct lcd_arch *lcd_arch, gpa_t a);
*/
static inline u64 lcd_arch_get_syscall_num(struct lcd_arch *lcd)
{
return lcd->regs[LCD_ARCH_REGS_RAX];
return lcd->regs.rax;
}
static inline u64 lcd_arch_get_syscall_arg0(struct lcd_arch *lcd)
{
......@@ -363,7 +384,7 @@ static inline u64 lcd_arch_get_syscall_arg3(struct lcd_arch *lcd)
}
static inline void lcd_arch_set_syscall_ret(struct lcd_arch *lcd, u64 val)
{
lcd->regs[LCD_ARCH_REGS_RAX] = val;
lcd->regs.rax = val;
}
#endif /* _ASM_X86_LCD_DOMAINS_ARCH_H */
......@@ -2213,13 +2213,15 @@ static void dump_lcd_arch(struct lcd_arch *lcd)
unsigned long flags;
vmx_get_cpu(lcd);
lcd->regs[LCD_ARCH_REGS_RIP] = vmcs_readl(GUEST_RIP);
lcd->regs[LCD_ARCH_REGS_RSP] = vmcs_readl(GUEST_RSP);
lcd->regs.rip = vmcs_readl(GUEST_RIP);
lcd->regs.rsp = vmcs_readl(GUEST_RSP);
flags = vmcs_readl(GUEST_RFLAGS);
vmx_put_cpu(lcd);
printk(KERN_ERR "---- Begin LCD Arch Dump ----\n");
printk(KERN_ERR "CPU %d VPID %d\n", lcd->cpu, lcd->vpid);
/*
printk(KERN_ERR "RIP 0x%016llx RFLAGS 0x%08lx\n",
lcd->regs[LCD_ARCH_REGS_RIP], flags);
printk(KERN_ERR "RAX 0x%016llx RCX 0x%016llx\n",
......@@ -2246,6 +2248,7 @@ static void dump_lcd_arch(struct lcd_arch *lcd)
printk(KERN_ERR "R14 0x%016llx R15 0x%016llx\n",
lcd->regs[LCD_ARCH_REGS_R14],
lcd->regs[LCD_ARCH_REGS_R15]);
*/
/* printk(KERN_ERR "Dumping Stack Contents...\n"); */
/* sp = (unsigned long *) vcpu->regs[VCPU_REGS_RSP]; */
......@@ -2398,12 +2401,50 @@ static int vmx_handle_control_reg(struct lcd_arch *lcd_arch)
/*
* Move to
*/
vmcs_writel(GUEST_CR3, lcd_arch->regs[general_reg]);
switch (general_reg){
case 0: vmcs_writel(GUEST_CR3, lcd_arch->regs.rax); break;
case 1: vmcs_writel(GUEST_CR3, lcd_arch->regs.rcx); break;
case 2: vmcs_writel(GUEST_CR3, lcd_arch->regs.rdx); break;
case 3: vmcs_writel(GUEST_CR3, lcd_arch->regs.rbx); break;
case 4: vmcs_writel(GUEST_CR3, lcd_arch->regs.rsp); break;
case 5: vmcs_writel(GUEST_CR3, lcd_arch->regs.rbp); break;
case 6: vmcs_writel(GUEST_CR3, lcd_arch->regs.rsi); break;
case 7: vmcs_writel(GUEST_CR3, lcd_arch->regs.rdi); break;
case 8: vmcs_writel(GUEST_CR3, lcd_arch->regs.r8); break;
case 9: vmcs_writel(GUEST_CR3, lcd_arch->regs.r9); break;
case 10: vmcs_writel(GUEST_CR3, lcd_arch->regs.r10); break;
case 11: vmcs_writel(GUEST_CR3, lcd_arch->regs.r11); break;
case 12: vmcs_writel(GUEST_CR3, lcd_arch->regs.r12); break;
case 13: vmcs_writel(GUEST_CR3, lcd_arch->regs.r13); break;
case 14: vmcs_writel(GUEST_CR3, lcd_arch->regs.r14); break;
case 15: vmcs_writel(GUEST_CR3, lcd_arch->regs.r15); break;
default: LCD_ARCH_ERR("Unknown general register in CR3 access:%d", general_reg);
}
} else {
/*
* Move from
*/
lcd_arch->regs[general_reg] = vmcs_readl(GUEST_CR3);
switch (general_reg){
case 0: lcd_arch->regs.rax = vmcs_readl(GUEST_CR3); break;
case 1: lcd_arch->regs.rcx = vmcs_readl(GUEST_CR3); break;
case 2: lcd_arch->regs.rdx = vmcs_readl(GUEST_CR3); break;
case 3: lcd_arch->regs.rbx = vmcs_readl(GUEST_CR3); break;
case 4: lcd_arch->regs.rsp = vmcs_readl(GUEST_CR3); break;
case 5: lcd_arch->regs.rbp = vmcs_readl(GUEST_CR3); break;
case 6: lcd_arch->regs.rsi = vmcs_readl(GUEST_CR3); break;
case 7: lcd_arch->regs.rdi = vmcs_readl(GUEST_CR3); break;
case 8: lcd_arch->regs.r8 = vmcs_readl(GUEST_CR3); break;
case 9: lcd_arch->regs.r9 = vmcs_readl(GUEST_CR3); break;
case 10: lcd_arch->regs.r10 = vmcs_readl(GUEST_CR3); break;
case 11: lcd_arch->regs.r11 = vmcs_readl(GUEST_CR3); break;
case 12: lcd_arch->regs.r12 = vmcs_readl(GUEST_CR3); break;
case 13: lcd_arch->regs.r13 = vmcs_readl(GUEST_CR3); break;
case 14: lcd_arch->regs.r14 = vmcs_readl(GUEST_CR3); break;
case 15: lcd_arch->regs.r15 = vmcs_readl(GUEST_CR3); break;
default: LCD_ARCH_ERR("Unknown general register in CR3 access:%d", general_reg);
}
}
/*
* Step past instruction that caused exit
......@@ -2716,35 +2757,35 @@ static void __noclone vmx_enter(struct lcd_arch *lcd_arch)
[fail]"i"(offsetof(struct lcd_arch, fail)),
[host_rsp]"i"(offsetof(struct lcd_arch, host_rsp)),
[rax]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_RAX])),
regs.rax)),
[rbx]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_RBX])),
regs.rbx)),
[rcx]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_RCX])),
regs.rcx)),
[rdx]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_RDX])),
regs.rdx)),
[rsi]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_RSI])),
regs.rsi)),
[rdi]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_RDI])),
regs.rdi)),
[rbp]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_RBP])),
regs.rbp)),
[r8]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_R8])),
regs.r8)),
[r9]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_R9])),
regs.r9)),
[r10]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_R10])),
regs.r10)),
[r11]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_R11])),
regs.r11)),
[r12]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_R12])),
regs.r12)),
[r13]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_R13])),
regs.r13)),
[r14]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_R14])),
regs.r14)),
[r15]"i"(offsetof(struct lcd_arch,
regs[LCD_ARCH_REGS_R15])),
regs.r15)),
[cr2]"i"(offsetof(struct lcd_arch, cr2)),
[wordsize]"i"(sizeof(ulong))
: "cc", "memory"
......@@ -2844,7 +2885,7 @@ out:
int lcd_arch_set_pc(struct lcd_arch *lcd_arch, gva_t a)
{
lcd_arch->regs[LCD_ARCH_REGS_RIP] = gva_val(a);
lcd_arch->regs.rip = gva_val(a);
/*
* Must load vmcs to modify it
*/
......@@ -2856,7 +2897,7 @@ int lcd_arch_set_pc(struct lcd_arch *lcd_arch, gva_t a)
int lcd_arch_set_sp(struct lcd_arch *lcd_arch, gva_t a)
{
lcd_arch->regs[LCD_ARCH_REGS_RSP] = gva_val(a);
lcd_arch->regs.rsp = gva_val(a);
/*
* Must load vmcs to modify it
*/
......
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