Commit d6dd9e93 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (50 commits)
  [MIPS] Add smp_call_function_single()
  [MIPS] thread_info.h: kmalloc + memset conversion to kzalloc
  [MIPS] Kexec: Fix several 64-bit bugs.
  [MIPS] Kexec: Fix several warnings.
  [MIPS] DDB5477: Remove support
  [MIPS] Fulong: Remove unneeded header file
  [MIPS] Cobalt: Enable UART on RaQ1
  [MIPS] Remove unused GROUP_TOSHIBA_NAMES
  [MIPS] remove some duplicate includes
  [MIPS] Oprofile: Fix rm9000 performance counter handler
  [MIPS] Use -Werror on subdirectories which build cleanly.
  [MIPS] Yosemite: Fix warning.
  [MIPS] PMON: Fix cpustart declaration.
  [MIPS] Yosemite: Only build ll_ht_smp_irq_handler() if HYPERTRANSPORT.
  [MIPS] Yosemite: Fix build error due to undeclared titan_mailbox_irq().
  [MIPS] Yosemite: Don't declare titan_mailbox_irq() as asmlinkage.
  [MIPS] Yosemite: Fix warnings in i2c-yoesmite by deleting the unused code.
  [MIPS] Delete unused arch/mips/gt64120/common/
  [MIPS] Fix build warning in unaligned load/store emulator.
  [MIPS] IP32: Don't ignore request_irq's return value.
  ...
parents dd9cd6d4 b4b2917c
......@@ -15,29 +15,6 @@ choice
prompt "System type"
default SGI_IP22
config LEMOTE_FULONG
bool "Lemote Fulong mini-PC"
select ARCH_SPARSEMEM_ENABLE
select SYS_HAS_CPU_LOONGSON2
select DMA_NONCOHERENT
select BOOT_ELF32
select BOARD_SCACHE
select HAVE_STD_PC_SERIAL_PORT
select HW_HAS_PCI
select I8259
select ISA
select IRQ_CPU
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select SYS_HAS_EARLY_PRINTK
select GENERIC_HARDIRQS_NO__DO_IRQ
select CPU_HAS_WB
help
Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
an FPGA northbridge
config MACH_ALCHEMY
bool "Alchemy processor based machines"
......@@ -131,6 +108,29 @@ config MACH_JAZZ
Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
Olivetti M700-10 workstations.
config LEMOTE_FULONG
bool "Lemote Fulong mini-PC"
select ARCH_SPARSEMEM_ENABLE
select SYS_HAS_CPU_LOONGSON2
select DMA_NONCOHERENT
select BOOT_ELF32
select BOARD_SCACHE
select HAVE_STD_PC_SERIAL_PORT
select HW_HAS_PCI
select I8259
select ISA
select IRQ_CPU
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select SYS_HAS_EARLY_PRINTK
select GENERIC_HARDIRQS_NO__DO_IRQ
select CPU_HAS_WB
help
Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
an FPGA northbridge
config MIPS_ATLAS
bool "MIPS Atlas board"
select BOOT_ELF32
......@@ -210,27 +210,6 @@ config MIPS_SEAD
This enables support for the MIPS Technologies SEAD evaluation
board.
config WR_PPMC
bool "Wind River PPMC board"
select IRQ_CPU
select BOOT_ELF32
select DMA_NONCOHERENT
select HW_HAS_PCI
select PCI_GT64XXX_PCI0
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
select SYS_HAS_CPU_MIPS64_R1
select SYS_HAS_CPU_NEVADA
select SYS_HAS_CPU_RM7000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
help
This enables support for the Wind River MIPS32 4KC PPMC evaluation
board, which is based on GT64120 bridge chip.
config MIPS_SIM
bool 'MIPS simulator (MIPSsim)'
select DMA_NONCOHERENT
......@@ -248,23 +227,24 @@ config MIPS_SIM
This option enables support for MIPS Technologies MIPSsim software
emulator.
config MOMENCO_OCELOT
bool "Momentum Ocelot board"
config MARKEINS
bool "NEC EMMA2RH Mark-eins"
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
select IRQ_CPU_RM7K
select PCI_GT64XXX_PCI0
select RM7000_CPU_SCACHE
select SWAP_IO_SPACE
select SYS_HAS_CPU_RM7000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_KGDB
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_HAS_CPU_R5000
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
This enables support for the R5432-based NEC Mark-eins
boards with R5500 CPU.
config MACH_VR41XX
bool "NEC VR4100 series based machines"
select SYS_HAS_CPU_VR41XX
select GENERIC_HARDIRQS_NO__DO_IRQ
config PNX8550_JBS
bool "Philips PNX8550 based JBS board"
......@@ -276,31 +256,6 @@ config PNX8550_STB810
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
config DDB5477
bool "NEC DDB Vrc-5477"
select DDB5XXX_COMMON
select DMA_NONCOHERENT
select HW_HAS_PCI
select I8259
select IRQ_CPU
select SYS_HAS_CPU_R5432
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
select SYS_SUPPORTS_KGDB
select SYS_SUPPORTS_KGDB
select SYS_SUPPORTS_LITTLE_ENDIAN
help
This enables support for the R5432-based NEC DDB Vrc-5477,
or Rockhopper/SolutionGear boards with R5432/R5500 CPUs.
Features : kernel debugging, serial terminal, NFS root fs, on-board
ether port USB, AC97, PCI, etc.
config MACH_VR41XX
bool "NEC VR4100 series based machines"
select SYS_HAS_CPU_VR41XX
select GENERIC_HARDIRQS_NO__DO_IRQ
config PMC_MSP
bool "PMC-Sierra MSP chipsets"
depends on EXPERIMENTAL
......@@ -367,20 +322,6 @@ config QEMU
simulate actual MIPS hardware platforms. More information on Qemu
can be found at http://www.linux-mips.org/wiki/Qemu.
config MARKEINS
bool "NEC EMMA2RH Mark-eins"
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
select SWAP_IO_SPACE
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_HAS_CPU_R5000
help
This enables support for the R5432-based NEC Mark-eins
boards with R5500 CPU.
config SGI_IP22
bool "SGI IP22 (Indy/Indigo2)"
select ARC
......@@ -443,41 +384,38 @@ config SGI_IP32
help
If you want this kernel to run on SGI O2 workstation, say Y here.
config SIBYTE_BIGSUR
bool "Sibyte BCM91480B-BigSur"
config SIBYTE_CRHINE
bool "Sibyte BCM91120C-CRhine"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
select NR_CPUS_DEFAULT_4
select PCI_DOMAINS
select SIBYTE_BCM1x80
select SIBYTE_BCM1120
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_SWARM
bool "Sibyte BCM91250A-SWARM"
config SIBYTE_CARMEL
bool "Sibyte BCM91120x-Carmel"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250
select SIBYTE_BCM1120
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_KGDB
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_SENTOSA
bool "Sibyte BCM91250E-Sentosa"
config SIBYTE_CRHONE
bool "Sibyte BCM91125C-CRhone"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250
select SIBYTE_BCM1125
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_RHONE
......@@ -491,19 +429,21 @@ config SIBYTE_RHONE
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_CARMEL
bool "Sibyte BCM91120x-Carmel"
depends on EXPERIMENTAL
config SIBYTE_SWARM
bool "Sibyte BCM91250A-SWARM"
select BOOT_ELF32
select DMA_COHERENT
select SIBYTE_BCM1120
select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_KGDB
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_PTSWARM
bool "Sibyte BCM91250PT-PTSWARM"
config SIBYTE_LITTLESUR
bool "Sibyte BCM91250C2-LittleSur"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
......@@ -515,8 +455,8 @@ config SIBYTE_PTSWARM
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_LITTLESUR
bool "Sibyte BCM91250C2-LittleSur"
config SIBYTE_SENTOSA
bool "Sibyte BCM91250E-Sentosa"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
......@@ -525,30 +465,31 @@ config SIBYTE_LITTLESUR
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_CRHINE
bool "Sibyte BCM91120C-CRhine"
config SIBYTE_PTSWARM
bool "Sibyte BCM91250PT-PTSWARM"
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
select SIBYTE_BCM1120
select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_CRHONE
bool "Sibyte BCM91125C-CRhone"
depends on EXPERIMENTAL
config SIBYTE_BIGSUR
bool "Sibyte BCM91480B-BigSur"
select BOOT_ELF32
select DMA_COHERENT
select SIBYTE_BCM1125
select NR_CPUS_DEFAULT_4
select PCI_DOMAINS
select SIBYTE_BCM1x80
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_LITTLE_ENDIAN
config SNI_RM
......@@ -595,7 +536,7 @@ config TOSHIBA_JMR3927
select GENERIC_HARDIRQS_NO__DO_IRQ
config TOSHIBA_RBTX4927
bool "Toshiba TBTX49[23]7 board"
bool "Toshiba RBTX49[23]7 board"
select DMA_NONCOHERENT
select HAS_TXX9_SERIAL
select HW_HAS_PCI
......@@ -632,10 +573,30 @@ config TOSHIBA_RBTX4938
This Toshiba board is based on the TX4938 processor. Say Y here to
support this machine type
config WR_PPMC
bool "Wind River PPMC board"
select IRQ_CPU
select BOOT_ELF32
select DMA_NONCOHERENT
select HW_HAS_PCI
select PCI_GT64XXX_PCI0
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
select SYS_HAS_CPU_MIPS64_R1
select SYS_HAS_CPU_NEVADA
select SYS_HAS_CPU_RM7000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
help
This enables support for the Wind River MIPS32 4KC PPMC evaluation
board, which is based on GT64120 bridge chip.
endchoice
source "arch/mips/au1000/Kconfig"
source "arch/mips/ddb5xxx/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
source "arch/mips/sgi-ip27/Kconfig"
......@@ -807,10 +768,6 @@ config IRQ_MSP_SLP
config IRQ_MSP_CIC
bool
config DDB5XXX_COMMON
bool
select SYS_SUPPORTS_KGDB
config MIPS_BOARDS_GEN
bool
......@@ -1377,17 +1334,6 @@ config MIPS_MT_SMTC
This is a kernel model which is known a SMTC or lately has been
marketesed into SMVP.
config MIPS_VPE_LOADER
bool "VPE loader support."
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
select CPU_MIPSR2_SRS
select MIPS_MT
help
Includes a loader for loading an elf relocatable object
onto another VPE and running it.
endchoice
config MIPS_MT
......@@ -1398,8 +1344,19 @@ config SYS_SUPPORTS_MULTITHREADING
config MIPS_MT_FPAFF
bool "Dynamic FPU affinity for FP-intensive threads"
depends on MIPS_MT
default y
depends on MIPS_MT_SMP || MIPS_MT_SMTC
config MIPS_VPE_LOADER
bool "VPE loader support."
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
select CPU_MIPSR2_SRS
select MIPS_MT
help
Includes a loader for loading an elf relocatable object
onto another VPE and running it.
config MIPS_MT_SMTC_INSTANT_REPLAY
bool "Low-latency Dispatch of Deferred SMTC IPIs"
......@@ -1772,7 +1729,7 @@ config KEXEC
config SECCOMP
bool "Enable seccomp to safely compute untrusted bytecode"
depends on PROC_FS && BROKEN
depends on PROC_FS
default y
help
This kernel feature is useful for number crunching applications
......
......@@ -67,6 +67,8 @@ cflags-y += $(call cc-option,-msym32)
endif
endif
all-$(CONFIG_BOOT_ELF32) := $(vmlinux-32)
all-$(CONFIG_BOOT_ELF64) := $(vmlinux-64)
#
# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
......@@ -309,6 +311,7 @@ core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
all-$(CONFIG_MIPS_ATLAS) := vmlinux.srec
#
# MIPS Malta board
......@@ -316,6 +319,7 @@ load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
all-$(CONFIG_MIPS_MALTA) := vmlinux.srec
#
# MIPS SEAD board
......@@ -323,6 +327,7 @@ load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
cflags-$(CONFIG_MIPS_SEAD) += -Iinclude/asm-mips/mach-mips
load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
all-$(CONFIG_MIPS_SEAD) := vmlinux.srec
#
# MIPS SIM
......@@ -331,17 +336,6 @@ core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/
cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-mipssim
load-$(CONFIG_MIPS_SIM) += 0x80100000
#
# Momentum Ocelot board
#
# The Ocelot setup.o must be linked early - it does the ioremap() for the
# mips_io_port_base.
#
core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
arch/mips/gt64120/momenco_ocelot/
cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
#
# PMC-Sierra MSP SOCs
#
......@@ -363,6 +357,7 @@ load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
core-$(CONFIG_QEMU) += arch/mips/qemu/
cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
load-$(CONFIG_QEMU) += 0xffffffff80010000
all-$(CONFIG_QEMU) := vmlinux.bin
#
# Basler eXcite
......@@ -371,17 +366,6 @@ core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/
cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite
load-$(CONFIG_BASLER_EXCITE) += 0x80100000
#
# NEC DDB
#
core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
#
# NEC DDB Vrc-5477
#
core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
load-$(CONFIG_DDB5477) += 0xffffffff80100000
#
# Common VR41xx
#
......@@ -554,6 +538,7 @@ load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
core-$(CONFIG_SNI_RM) += arch/mips/sni/
cflags-$(CONFIG_SNI_RM) += -Iinclude/asm-mips/mach-rm
load-$(CONFIG_SNI_RM) += 0xffffffff80600000
all-$(CONFIG_SNI_RM) := vmlinux.ecoff
#
# Toshiba JMR-TX3927 board
......@@ -647,33 +632,7 @@ vmlinux.64: vmlinux
makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
ifdef CONFIG_BOOT_ELF32
all: $(vmlinux-32)
endif
ifdef CONFIG_BOOT_ELF64
all: $(vmlinux-64)
endif
ifdef CONFIG_MIPS_ATLAS
all: vmlinux.srec
endif
ifdef CONFIG_MIPS_MALTA
all: vmlinux.srec
endif
ifdef CONFIG_MIPS_SEAD
all: vmlinux.srec
endif
ifdef CONFIG_QEMU
all: vmlinux.bin
endif
ifdef CONFIG_SNI_RM
all: vmlinux.ecoff
endif
all: $(all-y)
vmlinux.bin: $(vmlinux-32)
+@$(call makeboot,$@)
......@@ -700,6 +659,14 @@ endif
archclean:
@$(MAKE) $(clean)=arch/mips/boot
define archhelp
echo ' vmlinux.ecoff - ECOFF boot image'
echo ' vmlinux.bin - Raw binary boot image'
echo ' vmlinux.srec - SREC boot image'
echo
echo ' These will be default as apropriate for a configured platform.'
endef
CLEAN_FILES += vmlinux.32 \
vmlinux.64 \
vmlinux.ecoff
......@@ -13,63 +13,63 @@
#include <asm/arc/types.h>
#include <asm/sgialib.h>
LONG __init
LONG
ArcGetDirectoryEntry(ULONG FileID, struct linux_vdirent *Buffer,
ULONG N, ULONG *Count)
{
return ARC_CALL4(get_vdirent, FileID, Buffer, N, Count);
}
LONG __init
LONG
ArcOpen(CHAR *Path, enum linux_omode OpenMode, ULONG *FileID)
{
return ARC_CALL3(open, Path, OpenMode, FileID);
}
LONG __init
LONG
ArcClose(ULONG FileID)
{
return ARC_CALL1(close, FileID);
}
LONG __init
LONG
ArcRead(ULONG FileID, VOID *Buffer, ULONG N, ULONG *Count)
{
return ARC_CALL4(read, FileID, Buffer, N, Count);
}
LONG __init
LONG
ArcGetReadStatus(ULONG FileID)
{
return ARC_CALL1(get_rstatus, FileID);
}
LONG __init
LONG
ArcWrite(ULONG FileID, PVOID Buffer, ULONG N, PULONG Count)
{
return ARC_CALL4(write, FileID, Buffer, N, Count);
}
LONG __init
LONG
ArcSeek(ULONG FileID, struct linux_bigint *Position, enum linux_seekmode SeekMode)
{
return ARC_CALL3(seek, FileID, Position, SeekMode);
}
LONG __init
LONG
ArcMount(char *name, enum linux_mountops op)
{
return ARC_CALL2(mount, name, op);
}
LONG __init
LONG
ArcGetFileInformation(ULONG FileID, struct linux_finfo *Information)
{
return ARC_CALL2(get_finfo, FileID, Information);
}
LONG __init ArcSetFileInformation(ULONG FileID, ULONG AttributeFlags,
ULONG AttributeMask)
LONG ArcSetFileInformation(ULONG FileID, ULONG AttributeFlags,
ULONG AttributeMask)
{
return ARC_CALL3(set_finfo, FileID, AttributeFlags, AttributeMask);
}
......@@ -12,3 +12,5 @@ obj-y += prom.o irq.o puts.o time.o reset.o \
obj-$(CONFIG_KGDB) += dbg_io.o
obj-$(CONFIG_PCI) += pci.o
EXTRA_CFLAGS += -Werror
......@@ -42,10 +42,6 @@ vmlinux.srec: $(VMLINUX)
$(obj)/addinitrd: $(obj)/addinitrd.c
$(HOSTCC) -o $@ $^
archhelp:
@echo '* vmlinux.ecoff - ECOFF boot image'
@echo '* vmlinux.srec - SREC boot image'
clean-files += addinitrd \
elf2ecoff \
vmlinux.bin \
......
......@@ -7,3 +7,5 @@ obj-y := buttons.o irq.o reset.o rtc.o serial.o setup.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_EARLY_PRINTK) += console.o
obj-$(CONFIG_MTD_PHYSMAP) += mtd.o
EXTRA_CFLAGS += -Werror
......@@ -55,9 +55,9 @@ static __init int cobalt_uart_add(void)
int retval;
/*
* Cobalt Qube1 and RAQ1 have no UART.
* Cobalt Qube1 has no UART.
*/
if (cobalt_board_id <= COBALT_BRD_ID_RAQ1)
if (cobalt_board_id == COBALT_BRD_ID_QUBE1)
return 0;
pdev = platform_device_alloc("serial8250", -1);
......
......@@ -32,12 +32,9 @@ CONFIG_MIPS_ATLAS=y
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set