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xcap
xcap-capability-linux
Commits
c78cbf49
Commit
c78cbf49
authored
Sep 30, 2005
by
Ralf Baechle
Browse files
Support for MIPSsim, the cycle accurate MIPS simulator.
Signed-off-by:
Ralf Baechle
<
ralf@linux-mips.org
>
parent
b288f135
Changes
17
Hide whitespace changes
Inline
Side-by-side
arch/mips/Kconfig
View file @
c78cbf49
...
...
@@ -448,6 +448,17 @@ config MOMENCO_OCELOT_3
The Ocelot-3 is based off Discovery III System Controller and
PMC-Sierra Rm79000 core.
config MIPS_SIM
bool 'Support for MIPS simulator (MIPSsim)'
select DMA_NONCOHERENT
select IRQ_CPU
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
help
This option enables support for MIPS Technologies MIPSsim software
emulator.
config MOMENCO_JAGUAR_ATX
bool "Support for Momentum Jaguar board"
select BOOT_ELF32
...
...
arch/mips/Makefile
View file @
c78cbf49
...
...
@@ -436,6 +436,13 @@ load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
core-$(CONFIG_MIPS_SEAD)
+=
arch
/mips/mips-boards/sead/
load-$(CONFIG_MIPS_SEAD)
+=
0xffffffff80100000
#
# MIPS SIM
#
core-$(CONFIG_MIPS_SIM)
+=
arch
/mips/mips-boards/sim/
cflags-$(CONFIG_MIPS_SIM)
+=
-Iinclude
/asm-mips/mach-sim
load-$(CONFIG_MIPS_SIM)
+=
0x80100000
#
# Momentum Ocelot board
#
...
...
arch/mips/kernel/head.S
View file @
c78cbf49
...
...
@@ -116,7 +116,7 @@
EXPORT
(
stext
)
#
used
for
profiling
EXPORT
(
_stext
)
#ifdef
CONFIG_QEMU
#if
def
ined(
CONFIG_QEMU
) || defined(CONFIG_MIPS_SIM)
/
*
*
Give
us
a
fighting
chance
of
running
if
execution
beings
at
the
*
kernel
load
address
.
This
is
needed
because
this
platform
does
...
...
arch/mips/mips-boards/sim/Makefile
0 → 100644
View file @
c78cbf49
#
# Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
#
# This program is free software; you can distribute it and/or modify it
# under the terms of the GNU General Public License (Version 2) as
# published by the Free Software Foundation.
#
# This program is distributed in the hope it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
#
obj-y
:=
sim_setup.o sim_mem.o sim_time.o sim_printf.o sim_int.o sim_irq.o
\
sim_cmdline.o
obj-$(CONFIG_SMP)
+=
sim_smp.o
arch/mips/mips-boards/sim/cmdline.c
0 → 100644
View file @
c78cbf49
/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Kernel command line creation using the prom monitor (YAMON) argc/argv.
*/
#include <linux/init.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
extern
int
prom_argc
;
extern
int
*
_prom_argv
;
/*
* YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
* This macro take care of sign extension.
*/
#define prom_argv(index) ((char *)(((int *)(int)_prom_argv)[(index)]))
char
arcs_cmdline
[
CL_SIZE
];
char
*
__init
prom_getcmdline
(
void
)
{
return
&
(
arcs_cmdline
[
0
]);
}
void
__init
prom_init_cmdline
(
void
)
{
char
*
cp
;
int
actr
;
actr
=
1
;
/* Always ignore argv[0] */
cp
=
&
(
arcs_cmdline
[
0
]);
while
(
actr
<
prom_argc
)
{
strcpy
(
cp
,
prom_argv
(
actr
));
cp
+=
strlen
(
prom_argv
(
actr
));
*
cp
++
=
' '
;
actr
++
;
}
if
(
cp
!=
&
(
arcs_cmdline
[
0
]))
/* get rid of trailing space */
--
cp
;
*
cp
=
'\0'
;
}
arch/mips/mips-boards/sim/sim_IRQ.c
0 → 100644
View file @
c78cbf49
/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Interrupt exception dispatch code.
*/
#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
/* A lot of complication here is taken away because:
*
* 1) We handle one interrupt and return, sitting in a loop and moving across
* all the pending IRQ bits in the cause register is _NOT_ the answer, the
* common case is one pending IRQ so optimize in that direction.
*
* 2) We need not check against bits in the status register IRQ mask, that
* would make this routine slow as hell.
*
* 3) Linux only thinks in terms of all IRQs on or all IRQs off, nothing in
* between like BSD spl() brain-damage.
*
* Furthermore, the IRQs on the MIPS board look basically (barring software
* IRQs which we don't use at all and all external interrupt sources are
* combined together on hardware interrupt 0 (MIPS IRQ 2)) like:
*
* MIPS IRQ Source
* -------- ------
* 0 Software (ignored)
* 1 Software (ignored)
* 2 Combined hardware interrupt (hw0)
* 3 Hardware (ignored)
* 4 Hardware (ignored)
* 5 Hardware (ignored)
* 6 Hardware (ignored)
* 7 R4k timer (what we use)
*
* Note: On the SEAD board thing are a little bit different.
* Here IRQ 2 (hw0) is wired to the UART0 and IRQ 3 (hw1) is wired
* wired to UART1.
*
* We handle the IRQ according to _our_ priority which is:
*
* Highest ---- R4k Timer
* Lowest ---- Combined hardware interrupt
*
* then we just return, if multiple IRQs are pending then we will just take
* another exception, big deal.
*/
.
text
.
set
noreorder
.
set
noat
.
align
5
NESTED
(
mipsIRQ
,
PT_SIZE
,
sp
)
SAVE_ALL
CLI
.
set
at
mfc0
s0
,
CP0_CAUSE
#
get
irq
bits
mfc0
s1
,
CP0_STATUS
#
get
irq
mask
and
s0
,
s1
/* First we check for r4k counter/timer IRQ. */
andi
a0
,
s0
,
CAUSEF_IP7
beq
a0
,
zero
,
1
f
andi
a0
,
s0
,
CAUSEF_IP2
#
delay
slot
,
check
hw0
interrupt
/* Wheee, a timer interrupt. */
move
a0
,
sp
jal
mips_timer_interrupt
nop
j
ret_from_irq
nop
1
:
#if defined(CONFIG_MIPS_SEAD)
beq
a0
,
zero
,
1
f
andi
a0
,
s0
,
CAUSEF_IP3
#
delay
slot
,
check
hw1
interrupt
#else
beq
a0
,
zero
,
1
f
#
delay
slot
,
check
hw3
interrupt
andi
a0
,
s0
,
CAUSEF_IP5
#endif
/* Wheee, combined hardware level zero interrupt. */
#if defined(CONFIG_MIPS_ATLAS)
jal
atlas_hw0_irqdispatch
#elif defined(CONFIG_MIPS_MALTA)
jal
malta_hw0_irqdispatch
#elif defined(CONFIG_MIPS_SEAD)
jal
sead_hw0_irqdispatch
#else
#error "MIPS board not supported\n"
#endif
move
a0
,
sp
#
delay
slot
j
ret_from_irq
nop
#
delay
slot
1
:
#if defined(CONFIG_MIPS_SEAD)
beq
a0
,
zero
,
1
f
andi
a0
,
s0
,
CAUSEF_IP5
#
delay
slot
,
check
hw3
interrupt
jal
sead_hw1_irqdispatch
move
a0
,
sp
#
delay
slot
j
ret_from_irq
nop
#
delay
slot
1
:
#endif
#if defined(CONFIG_MIPS_MALTA)
beq
a0
,
zero
,
1
f
#
check
hw3
(
coreHI
)
interrupt
nop
jal
corehi_irqdispatch
move
a0
,
sp
j
ret_from_irq
nop
1
:
#endif
/*
* Here by mistake? This is possible, what can happen is that by the
* time we take the exception the IRQ pin goes low, so just leave if
* this is the case.
*/
move
a1
,
s0
PRINT
(
"Got interrupt: c0_cause = %08x
\n
"
)
mfc0
a1
,
CP0_EPC
PRINT
(
"c0_epc = %08x
\n
"
)
j
ret_from_irq
nop
END
(
mipsIRQ
)
arch/mips/mips-boards/sim/sim_cmdline.c
0 → 100644
View file @
c78cbf49
/*
* Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
*/
#include <linux/init.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
extern
char
arcs_cmdline
[];
char
*
__init
prom_getcmdline
(
void
)
{
return
arcs_cmdline
;
}
void
__init
prom_init_cmdline
(
void
)
{
/* nothing to do */
}
arch/mips/mips-boards/sim/sim_int.c
0 → 100644
View file @
c78cbf49
/*
* Copyright (C) 1999, 2005 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
*/
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <asm/mips-boards/simint.h>
extern
void
mips_cpu_irq_init
(
int
);
extern
asmlinkage
void
simIRQ
(
void
);
asmlinkage
void
sim_hw0_irqdispatch
(
struct
pt_regs
*
regs
)
{
do_IRQ
(
2
,
regs
);
}
void
__init
arch_init_irq
(
void
)
{
/* Now safe to set the exception vector. */
set_except_vector
(
0
,
simIRQ
);
mips_cpu_irq_init
(
MIPSCPU_INT_BASE
);
}
arch/mips/mips-boards/sim/sim_irq.S
0 → 100644
View file @
c78cbf49
/*
*
Copyright
(
C
)
1999
,
2005
MIPS
Technologies
,
Inc
.
All
rights
reserved
.
*
*
This
program
is
free
software
; you can distribute it and/or modify it
*
under
the
terms
of
the
GNU
General
Public
License
(
Version
2
)
as
*
published
by
the
Free
Software
Foundation
.
*
*
This
program
is
distributed
in
the
hope
it
will
be
useful
,
but
WITHOUT
*
ANY
WARRANTY
; without even the implied warranty of MERCHANTABILITY or
*
FITNESS
FOR
A
PARTICULAR
PURPOSE
.
See
the
GNU
General
Public
License
*
for
more
details
.
*
*
You
should
have
received
a
copy
of
the
GNU
General
Public
License
along
*
with
this
program
; if not, write to the Free Software Foundation, Inc.,
*
59
Temple
Place
-
Suite
330
,
Boston
MA
02111
-
1307
,
USA
.
*
*
Interrupt
exception
dispatch
code
.
*
*/
#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#include <asm/mips-boards/simint.h>
.
text
.
set
noreorder
.
set
noat
.
align
5
NESTED
(
simIRQ
,
PT_SIZE
,
sp
)
SAVE_ALL
CLI
.
set
at
mfc0
s0
,
CP0_CAUSE
#
get
irq
bits
mfc0
s1
,
CP0_STATUS
#
get
irq
mask
andi
s0
,
ST0_IM
#
CAUSE
.
CE
may
be
non
-
zero
!
and
s0
,
s1
#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
.
set
mips32
clz
a0
,
s0
.
set
mips0
negu
a0
addu
a0
,
31
-
CAUSEB_IP
bltz
a0
,
spurious
#else
beqz
s0
,
spurious
li
a0
,
7
and
t0
,
s0
,
0xf000
sltiu
t0
,
t0
,
1
sll
t0
,
2
subu
a0
,
t0
sll
s0
,
t0
and
t0
,
s0
,
0xc000
sltiu
t0
,
t0
,
1
sll
t0
,
1
subu
a0
,
t0
sll
s0
,
t0
and
t0
,
s0
,
0x8000
sltiu
t0
,
t0
,
1
#
sll
t0
,
0
subu
a0
,
t0
#
sll
s0
,
t0
#endif
#ifdef CASCADE_IRQ
li
a1
,
CASCADE_IRQ
bne
a0
,
a1
,
1
f
addu
a0
,
MIPSCPU_INT_BASE
jal
CASCADE_DISPATCH
move
a0
,
sp
j
ret_from_irq
nop
1
:
#else
addu
a0
,
MIPSCPU_INT_BASE
#endif
jal
do_IRQ
move
a1
,
sp
j
ret_from_irq
nop
spurious
:
j
spurious_interrupt
nop
END
(
simIRQ
)
arch/mips/mips-boards/sim/sim_mem.c
0 → 100644
View file @
c78cbf49
/*
* Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
#include <asm/bootinfo.h>
#include <asm/page.h>
#include <asm/mips-boards/prom.h>
/*#define DEBUG*/
enum
simmem_memtypes
{
simmem_reserved
=
0
,
simmem_free
,
};
struct
prom_pmemblock
mdesc
[
PROM_MAX_PMEMBLOCKS
];
#ifdef DEBUG
static
char
*
mtypes
[
3
]
=
{
"SIM reserved memory"
,
"SIM free memory"
,
};
#endif
/* References to section boundaries */
extern
char
_end
;
#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
struct
prom_pmemblock
*
__init
prom_getmdesc
(
void
)
{
unsigned
int
memsize
;
memsize
=
0x02000000
;
prom_printf
(
"Setting default memory size 0x%08x
\n
"
,
memsize
);
memset
(
mdesc
,
0
,
sizeof
(
mdesc
));
mdesc
[
0
].
type
=
simmem_reserved
;
mdesc
[
0
].
base
=
0x00000000
;
mdesc
[
0
].
size
=
0x00001000
;
mdesc
[
1
].
type
=
simmem_free
;
mdesc
[
1
].
base
=
0x00001000
;
mdesc
[
1
].
size
=
0x000ff000
;
mdesc
[
2
].
type
=
simmem_reserved
;
mdesc
[
2
].
base
=
0x00100000
;
mdesc
[
2
].
size
=
CPHYSADDR
(
PFN_ALIGN
(
&
_end
))
-
mdesc
[
2
].
base
;
mdesc
[
3
].
type
=
simmem_free
;
mdesc
[
3
].
base
=
CPHYSADDR
(
PFN_ALIGN
(
&
_end
));
mdesc
[
3
].
size
=
memsize
-
mdesc
[
3
].
base
;
return
&
mdesc
[
0
];
}
static
int
__init
prom_memtype_classify
(
unsigned
int
type
)
{
switch
(
type
)
{
case
simmem_free
:
return
BOOT_MEM_RAM
;
case
simmem_reserved
:
default:
return
BOOT_MEM_RESERVED
;
}
}
void
__init
prom_meminit
(
void
)
{
struct
prom_pmemblock
*
p
;
p
=
prom_getmdesc
();
while
(
p
->
size
)
{
long
type
;
unsigned
long
base
,
size
;
type
=
prom_memtype_classify
(
p
->
type
);
base
=
p
->
base
;
size
=
p
->
size
;
add_memory_region
(
base
,
size
,
type
);
p
++
;
}
}
unsigned
long
__init
prom_free_prom_memory
(
void
)
{
int
i
;
unsigned
long
freed
=
0
;
unsigned
long
addr
;
for
(
i
=
0
;
i
<
boot_mem_map
.
nr_map
;
i
++
)
{
if
(
boot_mem_map
.
map
[
i
].
type
!=
BOOT_MEM_ROM_DATA
)
continue
;
addr
=
boot_mem_map
.
map
[
i
].
addr
;
while
(
addr
<
boot_mem_map
.
map
[
i
].
addr
+
boot_mem_map
.
map
[
i
].
size
)
{
ClearPageReserved
(
virt_to_page
(
__va
(
addr
)));
set_page_count
(
virt_to_page
(
__va
(
addr
)),
1
);
free_page
((
unsigned
long
)
__va
(
addr
));
addr
+=
PAGE_SIZE
;
freed
+=
PAGE_SIZE
;
}
}
printk
(
"Freeing prom memory: %ldkb freed
\n
"
,
freed
>>
10
);
return
freed
;
}
arch/mips/mips-boards/sim/sim_printf.c
0 → 100644
View file @
c78cbf49
/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Putting things on the screen/serial line using YAMONs facilities.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/serial_reg.h>
#include <linux/spinlock.h>
#include <asm/io.h>
#include <asm/system.h>
static
inline
unsigned
int
serial_in
(
int
offset
)
{
return
inb
(
0x3f8
+
offset
);
}
static
inline
void
serial_out
(
int
offset
,
int
value
)
{
outb
(
value
,
0x3f8
+
offset
);
}
int
putPromChar
(
char
c
)
{
while
((
serial_in
(
UART_LSR
)
&
UART_LSR_THRE
)
==
0
)