Commit c2775b2e authored by Will Deacon's avatar Will Deacon Committed by Catalin Marinas
Browse files

arm64: switch_mm: simplify mm and CPU checks

switch_mm performs some checks to try and avoid entering the ASID

  (1) If we're switching to the init_mm (no user mappings), then simply
      set a reserved TTBR0 value with no page table (the zero page)

  (2) If prev == next *and* the mm_cpumask indicates that we've run on
      this CPU before, then we can skip the allocator.

However, there is plenty of redundancy here. With the new ASID allocator,
if prev == next, then we know that our ASID is valid and do not need to
worry about re-allocation. Consequently, we can drop the mm_cpumask check
in (2) and move the prev == next check before the init_mm check, since
if prev == next == init_mm then there's nothing to do.
Reviewed-by: default avatarCatalin Marinas <>
Signed-off-by: default avatarWill Deacon <>
Signed-off-by: default avatarCatalin Marinas <>
parent 5a7862e8
......@@ -129,6 +129,9 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
unsigned int cpu = smp_processor_id();
if (prev == next)
* init_mm.pgd does not contain any user mappings and it is always
* active for kernel addresses in TTBR1. Just set the reserved TTBR0.
......@@ -138,8 +141,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next)
check_and_switch_context(next, tsk);
check_and_switch_context(next, cpu);
#define deactivate_mm(tsk,mm) do { } while (0)
......@@ -166,10 +166,10 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu)
atomic64_set(&per_cpu(active_asids, cpu), asid);
cpumask_set_cpu(cpu, mm_cpumask(mm));
raw_spin_unlock_irqrestore(&cpu_asid_lock, flags);
cpumask_set_cpu(cpu, mm_cpumask(mm));
cpu_switch_mm(mm->pgd, mm);
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment