Commit be124c94 authored by Sascha Hauer's avatar Sascha Hauer
Browse files

system.c: runtime base address


Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent 8db5d1a6
......@@ -41,6 +41,7 @@ static struct map_desc imx_io_desc[] __initdata = {
void __init mx1_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MX1);
mxc_arch_reset_init(IO_ADDRESS(WDT_BASE_ADDR));
iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
}
......@@ -72,6 +72,7 @@ static struct map_desc mxc_io_desc[] __initdata = {
void __init mx21_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MX21);
mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
}
......@@ -79,6 +80,7 @@ void __init mx21_map_io(void)
void __init mx27_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MX27);
mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
}
......
......@@ -75,6 +75,7 @@ static struct map_desc mxc_io_desc[] __initdata = {
void __init mx31_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MX31);
mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
}
......@@ -82,6 +83,7 @@ void __init mx31_map_io(void)
void __init mx35_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MX35);
mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
}
......
......@@ -29,5 +29,6 @@ extern int mx35_clocks_init(void);
extern int mxc_register_gpios(void);
extern int mxc_register_device(struct platform_device *pdev, void *data);
extern void mxc_set_cpu_type(unsigned int type);
extern void mxc_arch_reset_init(void __iomem *);
#endif
......@@ -30,29 +30,28 @@
#include <asm/proc-fns.h>
#include <asm/system.h>
#ifdef CONFIG_ARCH_MX1
#define WDOG_WCR_REG IO_ADDRESS(WDT_BASE_ADDR)
#define WDOG_WCR_ENABLE (1 << 0)
#else
#define WDOG_WCR_REG IO_ADDRESS(WDOG_BASE_ADDR)
#define WDOG_WCR_ENABLE (1 << 2)
#endif
static void __iomem *wdog_base;
/*
* Reset the system. It is called by machine_restart().
*/
void arch_reset(char mode, const char *cmd)
{
if (!cpu_is_mx1()) {
unsigned int wcr_enable;
if (cpu_is_mx1()) {
wcr_enable = (1 << 0);
} else {
struct clk *clk;
clk = clk_get_sys("imx-wdt.0", NULL);
if (!IS_ERR(clk))
clk_enable(clk);
wcr_enable = (1 << 2);
}
/* Assert SRS signal */
__raw_writew(WDOG_WCR_ENABLE, WDOG_WCR_REG);
__raw_writew(wcr_enable, wdog_base);
/* wait for reset to assert... */
mdelay(500);
......@@ -65,3 +64,8 @@ void arch_reset(char mode, const char *cmd)
/* we'll take a jump through zero as a poor second */
cpu_reset(0);
}
void mxc_arch_reset_init(void __iomem *base)
{
wdog_base = base;
}
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