Commit bd45140d authored by Sascha Hauer's avatar Sascha Hauer Committed by Uwe Kleine-König
Browse files

ARM: mx3/imx35: Add EPIT support


Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarMichael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
parent f2b8901d
...@@ -9,6 +9,7 @@ config ARCH_MX35 ...@@ -9,6 +9,7 @@ config ARCH_MX35
bool bool
select ARCH_MXC_IOMUX_V3 select ARCH_MXC_IOMUX_V3
select ARCH_MXC_AUDMUX_V2 select ARCH_MXC_AUDMUX_V2
select HAVE_EPIT
comment "MX3 platforms:" comment "MX3 platforms:"
......
...@@ -364,8 +364,8 @@ DEFINE_CLOCK(cspi2_clk, 1, CCM_CGR0, 12, get_rate_ipg, NULL); ...@@ -364,8 +364,8 @@ DEFINE_CLOCK(cspi2_clk, 1, CCM_CGR0, 12, get_rate_ipg, NULL);
DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL); DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL);
DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL); DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL);
DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL); DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL);
DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg_per, NULL); DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg, NULL);
DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg_per, NULL); DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg, NULL);
DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL); DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL);
DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL); DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL);
DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL); DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL);
...@@ -456,8 +456,8 @@ static struct clk_lookup lookups[] = { ...@@ -456,8 +456,8 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "ect", ect_clk) _REGISTER_CLOCK(NULL, "ect", ect_clk)
_REGISTER_CLOCK(NULL, "edio", edio_clk) _REGISTER_CLOCK(NULL, "edio", edio_clk)
_REGISTER_CLOCK(NULL, "emi", emi_clk) _REGISTER_CLOCK(NULL, "emi", emi_clk)
_REGISTER_CLOCK(NULL, "epit", epit1_clk) _REGISTER_CLOCK("imx-epit.0", NULL, epit1_clk)
_REGISTER_CLOCK(NULL, "epit", epit2_clk) _REGISTER_CLOCK("imx-epit.1", NULL, epit2_clk)
_REGISTER_CLOCK(NULL, "esai", esai_clk) _REGISTER_CLOCK(NULL, "esai", esai_clk)
_REGISTER_CLOCK(NULL, "sdhc", esdhc1_clk) _REGISTER_CLOCK(NULL, "sdhc", esdhc1_clk)
_REGISTER_CLOCK(NULL, "sdhc", esdhc2_clk) _REGISTER_CLOCK(NULL, "sdhc", esdhc2_clk)
...@@ -535,8 +535,13 @@ int __init mx35_clocks_init() ...@@ -535,8 +535,13 @@ int __init mx35_clocks_init()
__raw_writel(cgr2, CCM_BASE + CCM_CGR2); __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
__raw_writel(cgr3, CCM_BASE + CCM_CGR3); __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
#ifdef CONFIG_MXC_USE_EPIT
epit_timer_init(&epit1_clk,
MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
#else
mxc_timer_init(&gpt_clk, mxc_timer_init(&gpt_clk,
MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT); MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
#endif
return 0; return 0;
} }
......
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