Commit bbed0dee authored by Eric Lapuyade's avatar Eric Lapuyade Committed by John W. Linville
Browse files

NFC: HCI based pn544 driver



This is an NFC driver for NXP pn544.
Unlike pn544.c, this one is based on the NFC HCI and SHDLC kernel layers.
Signed-off-by: default avatarEric Lapuyade <eric.lapuyade@intel.com>
Signed-off-by: default avatarSamuel Ortiz <sameo@linux.intel.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent e5fe4cf8
......@@ -17,6 +17,19 @@ config PN544_NFC
To compile this driver as a module, choose m here. The module will
be called pn544.
config PN544_HCI_NFC
tristate "HCI PN544 NFC driver"
depends on I2C && NFC_SHDLC
select CRC_CCITT
default n
---help---
NXP PN544 i2c driver.
This is a driver based on the SHDLC and HCI NFC kernel layers and
will thus not work with NXP libnfc library.
To compile this driver as a module, choose m here. The module will
be called pn544_hci.
config NFC_PN533
tristate "NXP PN533 USB driver"
depends on USB
......
......@@ -3,6 +3,7 @@
#
obj-$(CONFIG_PN544_NFC) += pn544.o
obj-$(CONFIG_PN544_HCI_NFC) += pn544_hci.o
obj-$(CONFIG_NFC_PN533) += pn533.o
obj-$(CONFIG_NFC_WILINK) += nfcwilink.o
......
/*
* HCI based Driver for NXP PN544 NFC Chip
*
* Copyright (C) 2012 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the
* Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#include <linux/crc-ccitt.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/miscdevice.h>
#include <linux/interrupt.h>
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/nfc.h>
#include <net/nfc/hci.h>
#include <net/nfc/shdlc.h>
#include <linux/nfc/pn544.h>
#define DRIVER_DESC "HCI NFC driver for PN544"
#define PN544_HCI_DRIVER_NAME "pn544_hci"
/* Timing restrictions (ms) */
#define PN544_HCI_RESETVEN_TIME 30
static struct i2c_device_id pn544_hci_id_table[] = {
{"pn544", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, pn544_hci_id_table);
#define HCI_MODE 0
#define FW_MODE 1
/* framing in HCI mode */
#define PN544_HCI_LLC_LEN 1
#define PN544_HCI_LLC_CRC 2
#define PN544_HCI_LLC_LEN_CRC (PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC)
#define PN544_HCI_LLC_MIN_SIZE (1 + PN544_HCI_LLC_LEN_CRC)
#define PN544_HCI_LLC_MAX_PAYLOAD 29
#define PN544_HCI_LLC_MAX_SIZE (PN544_HCI_LLC_LEN_CRC + 1 + \
PN544_HCI_LLC_MAX_PAYLOAD)
enum pn544_state {
PN544_ST_COLD,
PN544_ST_FW_READY,
PN544_ST_READY,
};
#define FULL_VERSION_LEN 11
/* Proprietary commands */
#define PN544_WRITE 0x3f
/* Proprietary gates, events, commands and registers */
/* NFC_HCI_RF_READER_A_GATE additional registers and commands */
#define PN544_RF_READER_A_AUTO_ACTIVATION 0x10
#define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION 0x12
#define PN544_MIFARE_CMD 0x21
/* Commands that apply to all RF readers */
#define PN544_RF_READER_CMD_PRESENCE_CHECK 0x30
#define PN544_RF_READER_CMD_ACTIVATE_NEXT 0x32
/* NFC_HCI_ID_MGMT_GATE additional registers */
#define PN544_ID_MGMT_FULL_VERSION_SW 0x10
#define PN544_RF_READER_ISO15693_GATE 0x12
#define PN544_RF_READER_F_GATE 0x14
#define PN544_FELICA_ID 0x04
#define PN544_FELICA_RAW 0x20
#define PN544_RF_READER_JEWEL_GATE 0x15
#define PN544_JEWEL_RAW_CMD 0x23
#define PN544_RF_READER_NFCIP1_INITIATOR_GATE 0x30
#define PN544_RF_READER_NFCIP1_TARGET_GATE 0x31
#define PN544_SYS_MGMT_GATE 0x90
#define PN544_SYS_MGMT_INFO_NOTIFICATION 0x02
#define PN544_POLLING_LOOP_MGMT_GATE 0x94
#define PN544_PL_RDPHASES 0x06
#define PN544_PL_EMULATION 0x07
#define PN544_PL_NFCT_DEACTIVATED 0x09
#define PN544_SWP_MGMT_GATE 0xA0
#define PN544_NFC_WI_MGMT_GATE 0xA1
static u8 pn544_custom_gates[] = {
PN544_SYS_MGMT_GATE,
PN544_SWP_MGMT_GATE,
PN544_POLLING_LOOP_MGMT_GATE,
PN544_NFC_WI_MGMT_GATE,
PN544_RF_READER_F_GATE,
PN544_RF_READER_JEWEL_GATE,
PN544_RF_READER_ISO15693_GATE,
PN544_RF_READER_NFCIP1_INITIATOR_GATE,
PN544_RF_READER_NFCIP1_TARGET_GATE
};
/* Largest headroom needed for outgoing custom commands */
#define PN544_CMDS_HEADROOM 2
struct pn544_hci_info {
struct i2c_client *i2c_dev;
struct nfc_shdlc *shdlc;
enum pn544_state state;
struct mutex info_lock;
unsigned int gpio_en;
unsigned int gpio_irq;
unsigned int gpio_fw;
unsigned int en_polarity;
int hard_fault; /*
* < 0 if hardware error occured (e.g. i2c err)
* and prevents normal operation.
*/
};
static void pn544_hci_platform_init(struct pn544_hci_info *info)
{
int polarity, retry, ret;
char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };
int count = sizeof(rset_cmd);
pr_info(DRIVER_DESC ": %s\n", __func__);
dev_info(&info->i2c_dev->dev, "Detecting nfc_en polarity\n");
/* Disable fw download */
gpio_set_value(info->gpio_fw, 0);
for (polarity = 0; polarity < 2; polarity++) {
info->en_polarity = polarity;
retry = 3;
while (retry--) {
/* power off */
gpio_set_value(info->gpio_en, !info->en_polarity);
usleep_range(10000, 15000);
/* power on */
gpio_set_value(info->gpio_en, info->en_polarity);
usleep_range(10000, 15000);
/* send reset */
dev_dbg(&info->i2c_dev->dev, "Sending reset cmd\n");
ret = i2c_master_send(info->i2c_dev, rset_cmd, count);
if (ret == count) {
dev_info(&info->i2c_dev->dev,
"nfc_en polarity : active %s\n",
(polarity == 0 ? "low" : "high"));
goto out;
}
}
}
dev_err(&info->i2c_dev->dev,
"Could not detect nfc_en polarity, fallback to active high\n");
out:
gpio_set_value(info->gpio_en, !info->en_polarity);
}
static int pn544_hci_enable(struct pn544_hci_info *info, int mode)
{
pr_info(DRIVER_DESC ": %s\n", __func__);
gpio_set_value(info->gpio_fw, 0);
gpio_set_value(info->gpio_en, info->en_polarity);
usleep_range(10000, 15000);
return 0;
}
static void pn544_hci_disable(struct pn544_hci_info *info)
{
pr_info(DRIVER_DESC ": %s\n", __func__);
gpio_set_value(info->gpio_fw, 0);
gpio_set_value(info->gpio_en, !info->en_polarity);
usleep_range(10000, 15000);
gpio_set_value(info->gpio_en, info->en_polarity);
usleep_range(10000, 15000);
gpio_set_value(info->gpio_en, !info->en_polarity);
usleep_range(10000, 15000);
}
static int pn544_hci_i2c_write(struct i2c_client *client, u8 *buf, int len)
{
int r;
usleep_range(3000, 6000);
r = i2c_master_send(client, buf, len);
if (r == -EREMOTEIO) { /* Retry, chip was in standby */
usleep_range(6000, 10000);
r = i2c_master_send(client, buf, len);
}
if (r >= 0 && r != len)
r = -EREMOTEIO;
return r;
}
static int check_crc(u8 *buf, int buflen)
{
u8 len;
u16 crc;
len = buf[0] + 1;
crc = crc_ccitt(0xffff, buf, len - 2);
crc = ~crc;
if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) {
pr_err(PN544_HCI_DRIVER_NAME ": CRC error 0x%x != 0x%x 0x%x\n",
crc, buf[len - 1], buf[len - 2]);
pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
16, 2, buf, buflen, false);
return -EPERM;
}
return 0;
}
/*
* Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
* that i2c bus will be flushed and that next read will start on a new frame.
* returned skb contains only LLC header and payload.
* returns:
* -EREMOTEIO : i2c read error (fatal)
* -EBADMSG : frame was incorrect and discarded
* -ENOMEM : cannot allocate skb, frame dropped
*/
static int pn544_hci_i2c_read(struct i2c_client *client, struct sk_buff **skb)
{
int r;
u8 len;
u8 tmp[PN544_HCI_LLC_MAX_SIZE - 1];
r = i2c_master_recv(client, &len, 1);
if (r != 1) {
dev_err(&client->dev, "cannot read len byte\n");
return -EREMOTEIO;
}
if ((len < (PN544_HCI_LLC_MIN_SIZE - 1)) ||
(len > (PN544_HCI_LLC_MAX_SIZE - 1))) {
dev_err(&client->dev, "invalid len byte\n");
r = -EBADMSG;
goto flush;
}
*skb = alloc_skb(1 + len, GFP_KERNEL);
if (*skb == NULL) {
r = -ENOMEM;
goto flush;
}
*skb_put(*skb, 1) = len;
r = i2c_master_recv(client, skb_put(*skb, len), len);
if (r != len) {
kfree_skb(*skb);
return -EREMOTEIO;
}
r = check_crc((*skb)->data, (*skb)->len);
if (r != 0) {
kfree_skb(*skb);
r = -EBADMSG;
goto flush;
}
skb_pull(*skb, 1);
skb_trim(*skb, (*skb)->len - 2);
usleep_range(3000, 6000);
return 0;
flush:
if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0)
r = -EREMOTEIO;
usleep_range(3000, 6000);
return r;
}
/*
* Reads an shdlc frame from the chip. This is not as straightforward as it
* seems. There are cases where we could loose the frame start synchronization.
* The frame format is len-data-crc, and corruption can occur anywhere while
* transiting on i2c bus, such that we could read an invalid len.
* In order to recover synchronization with the next frame, we must be sure
* to read the real amount of data without using the len byte. We do this by
* assuming the following:
* - the chip will always present only one single complete frame on the bus
* before triggering the interrupt
* - the chip will not present a new frame until we have completely read
* the previous one (or until we have handled the interrupt).
* The tricky case is when we read a corrupted len that is less than the real
* len. We must detect this here in order to determine that we need to flush
* the bus. This is the reason why we check the crc here.
*/
static irqreturn_t pn544_hci_irq_thread_fn(int irq, void *dev_id)
{
struct pn544_hci_info *info = dev_id;
struct i2c_client *client = info->i2c_dev;
struct sk_buff *skb = NULL;
int r;
BUG_ON(!info);
BUG_ON(irq != info->i2c_dev->irq);
dev_dbg(&client->dev, "IRQ\n");
if (info->hard_fault != 0)
return IRQ_HANDLED;
r = pn544_hci_i2c_read(client, &skb);
if (r == -EREMOTEIO) {
info->hard_fault = r;
nfc_shdlc_recv_frame(info->shdlc, NULL);
return IRQ_HANDLED;
} else if ((r == -ENOMEM) || (r == -EBADMSG)) {
return IRQ_HANDLED;
}
nfc_shdlc_recv_frame(info->shdlc, skb);
return IRQ_HANDLED;
}
static int pn544_hci_open(struct nfc_shdlc *shdlc)
{
struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
int r = 0;
mutex_lock(&info->info_lock);
if (info->state != PN544_ST_COLD) {
r = -EBUSY;
goto out;
}
r = pn544_hci_enable(info, HCI_MODE);
out:
mutex_unlock(&info->info_lock);
return r;
}
static void pn544_hci_close(struct nfc_shdlc *shdlc)
{
struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
mutex_lock(&info->info_lock);
if (info->state == PN544_ST_COLD)
goto out;
pn544_hci_disable(info);
out:
mutex_unlock(&info->info_lock);
}
static int pn544_hci_ready(struct nfc_shdlc *shdlc)
{
struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
struct sk_buff *skb;
static struct hw_config {
u8 adr[2];
u8 value;
} hw_config[] = {
{{0x9f, 0x9a}, 0x00},
{{0x98, 0x10}, 0xbc},
{{0x9e, 0x71}, 0x00},
{{0x98, 0x09}, 0x00},
{{0x9e, 0xb4}, 0x00},
{{0x9e, 0xd9}, 0xff},
{{0x9e, 0xda}, 0xff},
{{0x9e, 0xdb}, 0x23},
{{0x9e, 0xdc}, 0x21},
{{0x9e, 0xdd}, 0x22},
{{0x9e, 0xde}, 0x24},
{{0x9c, 0x01}, 0x08},
{{0x9e, 0xaa}, 0x01},
{{0x9b, 0xd1}, 0x0d},
{{0x9b, 0xd2}, 0x24},
{{0x9b, 0xd3}, 0x0a},
{{0x9b, 0xd4}, 0x22},
{{0x9b, 0xd5}, 0x08},
{{0x9b, 0xd6}, 0x1e},
{{0x9b, 0xdd}, 0x1c},
{{0x9b, 0x84}, 0x13},
{{0x99, 0x81}, 0x7f},
{{0x99, 0x31}, 0x70},
{{0x98, 0x00}, 0x3f},
{{0x9f, 0x09}, 0x00},
{{0x9f, 0x0a}, 0x05},
{{0x9e, 0xd1}, 0xa1},
{{0x99, 0x23}, 0x00},
{{0x9e, 0x74}, 0x80},
{{0x9f, 0x28}, 0x10},
{{0x9f, 0x35}, 0x14},
{{0x9f, 0x36}, 0x60},
{{0x9c, 0x31}, 0x00},
{{0x9c, 0x32}, 0xc8},
{{0x9c, 0x19}, 0x40},
{{0x9c, 0x1a}, 0x40},
{{0x9c, 0x0c}, 0x00},
{{0x9c, 0x0d}, 0x00},
{{0x9c, 0x12}, 0x00},
{{0x9c, 0x13}, 0x00},
{{0x98, 0xa2}, 0x0e},
{{0x98, 0x93}, 0x40},
{{0x98, 0x7d}, 0x02},
{{0x98, 0x7e}, 0x00},
{{0x9f, 0xc8}, 0x01},
};
struct hw_config *p = hw_config;
int count = ARRAY_SIZE(hw_config);
struct sk_buff *res_skb;
u8 param[4];
int r;
param[0] = 0;
while (count--) {
param[1] = p->adr[0];
param[2] = p->adr[1];
param[3] = p->value;
r = nfc_hci_send_cmd(hdev, PN544_SYS_MGMT_GATE, PN544_WRITE,
param, 4, &res_skb);
if (r < 0)
return r;
if (res_skb->len != 1) {
kfree_skb(res_skb);
return -EPROTO;
}
if (res_skb->data[0] != p->value) {
kfree_skb(res_skb);
return -EIO;
}
kfree_skb(res_skb);
p++;
}
param[0] = NFC_HCI_UICC_HOST_ID;
r = nfc_hci_set_param(hdev, NFC_HCI_ADMIN_GATE,
NFC_HCI_ADMIN_WHITELIST, param, 1);
if (r < 0)
return r;
param[0] = 0x3d;
r = nfc_hci_set_param(hdev, PN544_SYS_MGMT_GATE,
PN544_SYS_MGMT_INFO_NOTIFICATION, param, 1);
if (r < 0)
return r;
param[0] = 0x0;
r = nfc_hci_set_param(hdev, NFC_HCI_RF_READER_A_GATE,
PN544_RF_READER_A_AUTO_ACTIVATION, param, 1);
if (r < 0)
return r;
r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
NFC_HCI_EVT_END_OPERATION, NULL, 0);
if (r < 0)
return r;
param[0] = 0x1;
r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
PN544_PL_NFCT_DEACTIVATED, param, 1);
if (r < 0)
return r;
param[0] = 0x0;
r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
PN544_PL_RDPHASES, param, 1);
if (r < 0)
return r;
r = nfc_hci_get_param(hdev, NFC_HCI_ID_MGMT_GATE,
PN544_ID_MGMT_FULL_VERSION_SW, &skb);
if (r < 0)
return r;
if (skb->len != FULL_VERSION_LEN) {
kfree_skb(skb);
return -EINVAL;
}
print_hex_dump(KERN_DEBUG, "FULL VERSION SOFTWARE INFO: ",
DUMP_PREFIX_NONE, 16, 1,
skb->data, FULL_VERSION_LEN, false);
kfree_skb(skb);
return 0;
}
static int pn544_hci_xmit(struct nfc_shdlc *shdlc, struct sk_buff *skb)
{
struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
struct i2c_client *client = info->i2c_dev;
if (info->hard_fault != 0)
return info->hard_fault;
return pn544_hci_i2c_write(client, skb->data, skb->len);
}
static int pn544_hci_start_poll(struct nfc_shdlc *shdlc, u32 protocols)
{
struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
u8 phases = 0;
int r;
u8 duration[2];
u8 activated;
pr_info(DRIVER_DESC ": %s protocols = %d\n", __func__, protocols);
r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
NFC_HCI_EVT_END_OPERATION, NULL, 0);
if (r < 0)
return r;
duration[0] = 0x18;
duration[1] = 0x6a;
r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
PN544_PL_EMULATION, duration, 2);
if (r < 0)