From b59544649d6bb5134ab56764836efc29241ae5e0 Mon Sep 17 00:00:00 2001 From: Alexander Duyck <alexander.h.duyck@intel.com> Date: Mon, 19 Jul 2010 13:43:47 +0000 Subject: [PATCH] e1000: allow option to limit number of descriptors down to 48 per ring This change makes it possible to limit the number of descriptors down to 48 per ring. The reason for this change is to address a variation on hardware errata 10 for 82546GB in which descriptors will be lost if more than 32 descriptors are fetched and the PCI-X MRBC is 512. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Emil Tantilov <emil.s.tantilov@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net> --- drivers/net/e1000/e1000.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h index 40b62b406b08..65298a6d9af7 100644 --- a/drivers/net/e1000/e1000.h +++ b/drivers/net/e1000/e1000.h @@ -86,12 +86,12 @@ struct e1000_adapter; /* TX/RX descriptor defines */ #define E1000_DEFAULT_TXD 256 #define E1000_MAX_TXD 256 -#define E1000_MIN_TXD 80 +#define E1000_MIN_TXD 48 #define E1000_MAX_82544_TXD 4096 #define E1000_DEFAULT_RXD 256 #define E1000_MAX_RXD 256 -#define E1000_MIN_RXD 80 +#define E1000_MIN_RXD 48 #define E1000_MAX_82544_RXD 4096 #define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */ -- GitLab