Commit b2cfc653 authored by Bob Liu's avatar Bob Liu

blackfin: bf60x: add l2 ecc irq handler

bf60x support l2 hardware ecc error check, add panic when double bits ecc error
Signed-off-by: default avatarBob Liu <>
parent c55c89e9
......@@ -186,9 +186,45 @@ static void __init l1_inst_sram_init(void)
#ifdef __ADSPBF60x__
static irqreturn_t l2_ecc_err(int irq, void *dev_id)
int status;
printk(KERN_ERR "L2 ecc error happend\n");
status = bfin_read32(L2CTL0_STAT);
if (status & 0x1)
printk(KERN_ERR "Core channel error type:0x%x, addr:0x%x\n",
bfin_read32(L2CTL0_ET0), bfin_read32(L2CTL0_EADDR0));
if (status & 0x2)
printk(KERN_ERR "System channel error type:0x%x, addr:0x%x\n",
bfin_read32(L2CTL0_ET1), bfin_read32(L2CTL0_EADDR1));
status = status >> 8;
if (status)
printk(KERN_ERR "L2 Bank%d error, addr:0x%x\n",
status, bfin_read32(L2CTL0_ERRADDR0 + status));
panic("L2 Ecc error");
static void __init l2_sram_init(void)
#if L2_LENGTH != 0
#ifdef __ADSPBF60x__
int ret;
ret = request_irq(IRQ_L2CTL0_ECC_ERR, l2_ecc_err, 0, "l2-ecc-err",
if (unlikely(ret < 0)) {
printk(KERN_INFO "Fail to request l2 ecc error interrupt");
#endif =
kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
if (! {
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