Commit b06b5a53 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 4081/1: Add definition for TI Sync Serial Protocol
  [ARM] 4080/1: Fix for the SSCR0_SlotsPerFrm macro
  [ARM] Fix VFP initialisation issue for SMP systems
  [ARM] 4078/1: Fix ARM copypage cache coherency problems
  [ARM] 4077/1: iop13xx: fix __io() macro
  [ARM] 4074/1: Flat loader stack alignment
  [ARM] 4073/1: Prevent s3c24xx drivers from including asm/arch/hardware.h and asm/arch/irqs.h
  [ARM] 4071/1: S3C24XX: Documentation update
  [ARM] 4066/1: correct a comment about PXA's sched_clock range
  [ARM] 4065/1: S3C24XX: dma printk fixes
  [ARM] 4064/1: make pxa_get_cycles() static
  [ARM] 4063/1: ep93xx: fix IRQ_EP93XX_GPIO?MUX numbering
parents c6b33cc4 d02b161e
......@@ -76,6 +76,15 @@ Machines
A S3C2410 based PDA from Acer. There is a Wiki page at
http://handhelds.org/moin/moin.cgi/AcerN30Documentation .
AML M5900
American Microsystems' M5900
Nex Vision Nexcoder
Nex Vision Otom
Two machines by Nex Vision
Adding New Machines
-------------------
......@@ -115,6 +124,10 @@ RTC
Support for the onboard RTC unit, including alarm function.
This has recently been upgraded to use the new RTC core,
and the module has been renamed to rtc-s3c to fit in with
the new rtc naming scheme.
Watchdog
--------
......@@ -128,7 +141,7 @@ NAND
The current kernels now have support for the s3c2410 NAND
controller. If there are any problems the latest linux-mtd
CVS can be found from http://www.linux-mtd.infradead.org/
code can be found from http://www.linux-mtd.infradead.org/
Serial
......@@ -168,6 +181,21 @@ Suspend to RAM
See Suspend.txt for more information.
SPI
---
SPI drivers are available for both the in-built hardware
(although there is no DMA support yet) and a generic
GPIO based solution.
LEDs
----
There is support for GPIO based LEDs via a platform driver
in the LED subsystem.
Platform Data
-------------
......
......@@ -21,6 +21,25 @@
#include <asm/hardware.h>
#include <asm/io.h>
void * __iomem __iop13xx_io(unsigned long io_addr)
{
void __iomem * io_virt;
switch (io_addr) {
case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA:
io_virt = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(io_addr);
break;
case IOP13XX_PCIX_LOWER_IO_PA ... IOP13XX_PCIX_UPPER_IO_PA:
io_virt = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(io_addr);
break;
default:
BUG();
}
return io_virt;
}
EXPORT_SYMBOL(__iop13xx_io);
void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
unsigned long flags)
{
......
......@@ -76,7 +76,9 @@ unsigned long long sched_clock(void)
/*
* 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for
* any value of CLOCK_TICK_RATE. Max value is in the 80 thousand
* years range which is nice, but with higher computation cost.
* years range and truncation to unsigned long long limits it to
* sched_clock's max range of ~584 years. This is nice but with
* higher computation cost.
*/
{
union {
......
......@@ -101,7 +101,7 @@ static struct irqaction pxa_timer_irq = {
.handler = pxa_timer_interrupt,
};
cycle_t pxa_get_cycles(void)
static cycle_t pxa_get_cycles(void)
{
return OSCR;
}
......@@ -134,13 +134,13 @@ static void __init pxa_timer_init(void)
OSMR0 = OSCR + LATCH; /* set initial match */
local_irq_restore(flags);
/* on PXA OSCR runs continiously and is not written to, so we can use it
* as clock source directly.
/*
* OSCR runs continuously on PXA and is not written to,
* so we can use it as clock source directly.
*/
clocksource_pxa.mult =
clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift);
clocksource_register(&clocksource_pxa);
}
#ifdef CONFIG_NO_IDLE_HZ
......
......@@ -1053,11 +1053,11 @@ int s3c2410_dma_config(dmach_t channel,
if (chan == NULL)
return -EINVAL;
printk("Initial dcon is %08x\n", dcon);
pr_debug("%s: Initial dcon is %08x\n", __FUNCTION__, dcon);
dcon |= chan->dcon & dma_sel.dcon_mask;
printk("New dcon is %08x\n", dcon);
pr_debug("%s: New dcon is %08x\n", __FUNCTION__, dcon);
switch (xferunit) {
case 1:
......
......@@ -19,6 +19,7 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
#include <asm/cacheflush.h>
#include "mm.h"
......@@ -69,6 +70,11 @@ mc_copy_user_page(void *from, void *to)
void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
{
struct page *page = virt_to_page(kfrom);
if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
__flush_dcache_page(page_mapping(page), page);
spin_lock(&minicache_lock);
set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);
......
......@@ -53,6 +53,10 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo
{
unsigned int offset = CACHE_COLOUR(vaddr);
unsigned long from, to;
struct page *page = virt_to_page(kfrom);
if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
__flush_dcache_page(page_mapping(page), page);
/*
* Discard data in the kernel mapping for the new page.
......
......@@ -19,6 +19,7 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
#include <asm/cacheflush.h>
#include "mm.h"
......@@ -91,6 +92,11 @@ mc_copy_user_page(void *from, void *to)
void xscale_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
{
struct page *page = virt_to_page(kfrom);
if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
__flush_dcache_page(page_mapping(page), page);
spin_lock(&minicache_lock);
set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);
......
......@@ -264,6 +264,18 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
}
static void vfp_enable(void *unused)
{
u32 access = get_copro_access();
/*
* Enable full access to VFP (cp10 and cp11)
*/
set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
}
#include <linux/smp.h>
/*
* VFP support code initialisation.
*/
......@@ -288,6 +300,7 @@ static int __init vfp_init(void)
* we just need to read the VFPSID register.
*/
vfpsid = fmrx(FPSID);
barrier();
printk(KERN_INFO "VFP support v0.3: ");
if (VFP_arch) {
......@@ -301,6 +314,8 @@ static int __init vfp_init(void)
} else if (vfpsid & FPSID_NODOUBLE) {
printk("no double precision support\n");
} else {
smp_call_function(vfp_enable, NULL, 1, 1);
VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */
printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
(vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
......
......@@ -22,9 +22,9 @@
#define IRQ_EP93XX_DMAM2P9 16
#define IRQ_EP93XX_DMAM2M0 17
#define IRQ_EP93XX_DMAM2M1 18
#define IRQ_EP93XX_GPIO0MUX 20
#define IRQ_EP93XX_GPIO1MUX 21
#define IRQ_EP93XX_GPIO2MUX 22
#define IRQ_EP93XX_GPIO0MUX 19
#define IRQ_EP93XX_GPIO1MUX 20
#define IRQ_EP93XX_GPIO2MUX 21
#define IRQ_EP93XX_GPIO3MUX 22
#define IRQ_EP93XX_UART1RX 23
#define IRQ_EP93XX_UART1TX 24
......
......@@ -21,10 +21,11 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) (a)
#define __io(a) __iop13xx_io(a)
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
extern void __iomem * __iop13xx_io(unsigned long io_addr);
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size,
unsigned long flags);
......
......@@ -1626,7 +1626,7 @@
#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */
#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */
#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */
#define SSCR0_SlotsPerFrm(x) ((x) - 1) /* Time slots per frame [1..8] */
#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */
#define SSCR0_ADC (1 << 30) /* Audio clock select */
#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */
#endif
......@@ -1655,6 +1655,7 @@
#define SSCR0_EDSS (1 << 20) /* Extended Data Size Select */
/* extra bits in PXA255, PXA26x and PXA27x SSP ports */
#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */
#define SSCR0_PSP (3 << 4) /* PSP - Programmable Serial Protocol */
#define SSCR1_TTELP (1 << 31) /* TXD Tristate Enable Last Phase */
#define SSCR1_TTE (1 << 30) /* TXD Tristate Enable */
......
......@@ -14,7 +14,7 @@
#define __ASM_ARCH_DMA_H __FILE__
#include <linux/sysdev.h>
#include "hardware.h"
#include <asm/hardware.h>
/*
* This is the maximum DMA address(physical address) that can be DMAd to.
......
......@@ -20,7 +20,7 @@
#define INTOFFSET (0x14)
#include <asm/hardware.h>
#include <asm/arch/irqs.h>
#include <asm/irq.h>
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
......
......@@ -13,6 +13,10 @@
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#ifndef __ASM_HARDWARE_H
#error "Do not include this directly, instead #include <asm/hardware.h>"
#endif
#ifndef __ASSEMBLY__
/* external functions for GPIO support
......
......@@ -12,6 +12,9 @@
#ifndef __ASM_ARCH_IRQS_H
#define __ASM_ARCH_IRQS_H __FILE__
#ifndef __ASM_ARM_IRQ_H
#error "Do not include this directly, instead #include <asm/irq.h>"
#endif
/* we keep the first set of CPU IRQs out of the range of
* the ISA space, so that the PC104 has them to itself
......
......@@ -355,6 +355,8 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
*/
extern void flush_dcache_page(struct page *);
extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
#define flush_dcache_mmap_lock(mapping) \
write_lock_irq(&(mapping)->tree_lock)
#define flush_dcache_mmap_unlock(mapping) \
......
......@@ -5,7 +5,9 @@
#ifndef __ARM_FLAT_H__
#define __ARM_FLAT_H__
#define flat_stack_align(sp) /* nothing needed */
/* An odd number of words will be pushed after this alignment, so
deliberately misalign the value. */
#define flat_stack_align(sp) sp = (void *)(((unsigned long)(sp) - 4) | 4)
#define flat_argvp_envp_on_stack() 1
#define flat_old_ram_flag(flags) (flags)
#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
......
......@@ -19,7 +19,6 @@
#define NO_IRQ ((unsigned int)(-1))
#endif
struct irqaction;
/*
* Migration helpers
......@@ -37,6 +36,10 @@ struct irqaction;
#define IRQT_HIGH (__IRQT_HIGHLVL)
#define IRQT_PROBE IRQ_TYPE_PROBE
#ifndef __ASSEMBLY__
struct irqaction;
extern void migrate_irqs(void);
#endif
#endif
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