Commit b03cc885 authored by Ard Biesheuvel's avatar Ard Biesheuvel Committed by Will Deacon

arm64: kernel: replace early 64-bit literal loads with move-immediates

When building a relocatable kernel, we currently rely on the fact that
early 64-bit literal loads need to be deferred to after the relocation
has been performed only if they involve symbol references, and not if
they involve assemble time constants. While this is not an unreasonable
assumption to make, it is better to switch to movk/movz sequences, since
these are guaranteed to be resolved at link time, simply because there are
no dynamic relocation types to describe them.
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 30b5ba5c
......@@ -337,7 +337,7 @@ __create_page_tables:
cmp x0, x6
b.lo 1b
ldr x7, =SWAPPER_MM_MMUFLAGS
mov x7, SWAPPER_MM_MMUFLAGS
/*
* Create the identity mapping.
......@@ -393,7 +393,7 @@ __create_page_tables:
* Map the kernel image (starting with PHYS_OFFSET).
*/
mov x0, x26 // swapper_pg_dir
ldr x5, =KIMAGE_VADDR
mov_q x5, KIMAGE_VADDR
add x5, x5, x23 // add KASLR displacement
create_pgd_entry x0, x5, x3, x6
ldr w6, =kernel_img_size
......@@ -631,7 +631,7 @@ ENTRY(secondary_holding_pen)
bl el2_setup // Drop to EL1, w20=cpu_boot_mode
bl set_cpu_boot_mode_flag
mrs x0, mpidr_el1
ldr x1, =MPIDR_HWID_BITMASK
mov_q x1, MPIDR_HWID_BITMASK
and x0, x0, x1
adr_l x3, secondary_holding_pen_release
pen: ldr x4, [x3]
......@@ -773,7 +773,7 @@ __primary_switch:
ldr w9, =__rela_offset // offset to reloc table
ldr w10, =__rela_size // size of reloc table
ldr x11, =KIMAGE_VADDR // default virtual offset
mov_q x11, KIMAGE_VADDR // default virtual offset
add x11, x11, x23 // actual virtual offset
add x8, x8, x11 // __va(.dynsym)
add x9, x9, x11 // __va(.rela)
......
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